From: lkcl <lkcl@web>
Date: Thu, 24 Dec 2020 14:50:07 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~953
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5c631334270138e9ba422d51009cc5858ebaf1fb;p=libreriscv.git

---

diff --git a/openpower/sv/overview.mdwn b/openpower/sv/overview.mdwn
index 8407b8615..5feadf406 100644
--- a/openpower/sv/overview.mdwn
+++ b/openpower/sv/overview.mdwn
@@ -14,11 +14,10 @@ The fundamentals are:
 * The Program Counter gains a "Sub Counter" context.
 * Vectorisation pauses the PC and runs a loop from 0 to VL-1
  (where VL is Vector Length)
-* During the loop the instruction at the PC is executed *multiple* 
-  times.
 * Some registers may be "tagged" as Vectors
-* During the loop, "Vector"-tagged register are incrememted by
-  one with each iteration.
+* During the loop, "Vector"-tagged register are incremented by
+  one with each iteration, executing the *same instruction*
+  but with *different regusters*
 * Once the loop is completed *only then* is the Program Counter
   allowed to move to the next instruction.