From: Eric Anholt Date: Fri, 1 May 2020 23:26:24 +0000 (-0700) Subject: freedreno/ir3: Define the bindful uniform/nonuniform desc modes for cat6 a6xx. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5c81f51c3c7fb7aa86cee3d9ba4324b1610c726d;p=mesa.git freedreno/ir3: Define the bindful uniform/nonuniform desc modes for cat6 a6xx. These come from the disasm tests, and fix our disasm of blob's uniform/nonuniform cat6 operands. We also now include human-readable names for all the modes we know about (though bindless gets distinguished by its .baseN, like Connor's original disasm). Part-of: --- diff --git a/src/freedreno/ir3/disasm-a3xx.c b/src/freedreno/ir3/disasm-a3xx.c index 697219ce405..82ecb7c4e49 100644 --- a/src/freedreno/ir3/disasm-a3xx.c +++ b/src/freedreno/ir3/disasm-a3xx.c @@ -992,24 +992,37 @@ static void print_instr_cat6_a6xx(struct disasm_ctx *ctx, instr_t *instr) static const struct { bool indirect; bool bindless; - bool uniform; + const char *name; } desc_features[8] = { - [CAT6_IMM] = { false }, - [CAT6_BINDLESS_IMM] = { .bindless = true, }, + [CAT6_IMM] = { + .name = "imm" + }, + [CAT6_UNIFORM] = { + .indirect = true, + .name = "uniform" + }, + [CAT6_NONUNIFORM] = { + .indirect = true, + .name = "nonuniform" + }, + [CAT6_BINDLESS_IMM] = { + .bindless = true, + .name = "imm" + }, [CAT6_BINDLESS_UNIFORM] = { .bindless = true, .indirect = true, - .uniform = true, + .name = "uniform" }, [CAT6_BINDLESS_NONUNIFORM] = { .bindless = true, .indirect = true, + .name = "nonuniform" }, }; bool indirect_ssbo = desc_features[cat6->desc_mode].indirect; bool bindless = desc_features[cat6->desc_mode].bindless; - bool uniform = desc_features[cat6->desc_mode].uniform; bool type_full = cat6->type != TYPE_U16; @@ -1026,10 +1039,9 @@ static void print_instr_cat6_a6xx(struct disasm_ctx *ctx, instr_t *instr) } fprintf(ctx->out, ".%u", cat6->type_size + 1); + fprintf(ctx->out, ".%s", desc_features[cat6->desc_mode].name); if (bindless) fprintf(ctx->out, ".base%d", cat6->base); - if (uniform) - fprintf(ctx->out, ".uniform"); fprintf(ctx->out, " "); src2.reg = (reg_t)(cat6->src2); diff --git a/src/freedreno/ir3/instr-a3xx.h b/src/freedreno/ir3/instr-a3xx.h index 23b21eb653d..e4f548d639a 100644 --- a/src/freedreno/ir3/instr-a3xx.h +++ b/src/freedreno/ir3/instr-a3xx.h @@ -829,11 +829,13 @@ typedef union PACKED { /* Similar to cat5_desc_mode_t, describes how the descriptor is loaded. */ typedef enum { - /* Use old GL binding model with an immediate index. - * TODO: find CAT6_UNIFORM and CAT6_NONUNIFORM - */ + /* Use old GL binding model with an immediate index. */ CAT6_IMM = 0, + CAT6_UNIFORM = 1, + + CAT6_NONUNIFORM = 2, + /* Use the bindless model, with an immediate index. */ CAT6_BINDLESS_IMM = 4, diff --git a/src/freedreno/ir3/ir3.c b/src/freedreno/ir3/ir3.c index 8c30bf98298..2fe323eaf76 100644 --- a/src/freedreno/ir3/ir3.c +++ b/src/freedreno/ir3/ir3.c @@ -572,9 +572,10 @@ static int emit_cat6_a6xx(struct ir3_instruction *instr, void *ptr, } cat6->base = instr->cat6.base; } else { - /* TODO figure out mode for indirect SSBO index in !bindless */ - iassert(ssbo->flags & IR3_REG_IMMED); - cat6->desc_mode = CAT6_IMM; + if (ssbo->flags & IR3_REG_IMMED) + cat6->desc_mode = CAT6_IMM; + else + cat6->desc_mode = CAT6_UNIFORM; } switch (instr->opc) { diff --git a/src/freedreno/ir3/tests/disasm.c b/src/freedreno/ir3/tests/disasm.c index ba6af205834..3ab1e392cc6 100644 --- a/src/freedreno/ir3/tests/disasm.c +++ b/src/freedreno/ir3/tests/disasm.c @@ -76,8 +76,8 @@ static const struct test { /* cat6 */ INSTR_6XX(c0c00000_00000000, "stg.f16 g[hr0.x], hr0.x, hr0.x"), INSTR_6XX(c1100000_c1000000, "stl.f16 l[0], hr0.x, hr48.y"), - INSTR_6XX(c0260000_0063c200, "resinfo.untyped.2d.u32.1 r0.x, r0.x, 0"), /* resinfo.u32.2d.mode0.base0 r0.x, 0 */ - INSTR_6XX(c0260000_0063c000, "resinfo.untyped.1d.u32.1 r0.x, r0.x, 0"), /* resinfo.u32.1d.mode0.base0 r0.x, 0 */ + INSTR_6XX(c0260000_0063c200, "resinfo.untyped.2d.u32.1.imm r0.x, r0.x, 0"), /* resinfo.u32.2d.mode0.base0 r0.x, 0 */ + INSTR_6XX(c0260000_0063c000, "resinfo.untyped.1d.u32.1.imm r0.x, r0.x, 0"), /* resinfo.u32.1d.mode0.base0 r0.x, 0 */ /* discard stuff */ INSTR_6XX(42b400f8_20010004, "cmps.s.eq p0.x, r1.x, 1"), @@ -101,16 +101,16 @@ static const struct test { * important info they lack(?!), but same goes the other way. */ /* dEQP-GLES31.functional.shaders.opaque_type_indexing.ubo.uniform_fragment */ - INSTR_6XX(c0260000_00c78040, "ldc.offset0.1 r0.x, r0.x, 0"), /* ldc.1.mode1.base0 r0.x, 0, r0.x */ - INSTR_6XX(c0260201_00c78040, "ldc.offset0.1 r0.y, r0.x, 1"), /* ldc.1.mode1.base0 r0.y, 0, r0.y */ + INSTR_6XX(c0260000_00c78040, "ldc.offset0.1.uniform r0.x, r0.x, r0.x"), /* ldc.1.mode1.base0 r0.x, 0, r0.x */ + INSTR_6XX(c0260201_00c78040, "ldc.offset0.1.uniform r0.y, r0.x, r0.y"), /* ldc.1.mode1.base0 r0.y, 0, r0.y */ /* dEQP-GLES31.functional.shaders.opaque_type_indexing.ubo.dynamically_uniform_fragment */ - INSTR_6XX(c0260000_00c78080, "ldc.offset0.1 r0.x, r0.x, 0"), /* ldc.1.mode2.base0 r0.x, 0, r0.x */ - INSTR_6XX(c0260201_00c78080, "ldc.offset0.1 r0.y, r0.x, 1"), /* ldc.1.mode2.base0 r0.y, 0, r0.y */ + INSTR_6XX(c0260000_00c78080, "ldc.offset0.1.nonuniform r0.x, r0.x, r0.x"), /* ldc.1.mode2.base0 r0.x, 0, r0.x */ + INSTR_6XX(c0260201_00c78080, "ldc.offset0.1.nonuniform r0.y, r0.x, r0.y"), /* ldc.1.mode2.base0 r0.y, 0, r0.y */ /* custom shaders, loading .x, .y, .z, .w from an array of vec4 in block 0 */ - INSTR_6XX(c0260000_00478000, "ldc.offset0.1 r0.x, r0.x, 0"), /* ldc.1.mode0.base0 r0.x, r0.x, 0 */ - INSTR_6XX(c0260000_00478200, "ldc.offset1.1 r0.x, r0.x, 0"), /* ldc.1.mode0.base0 r0.x, r0.x, 0 */ - INSTR_6XX(c0260000_00478400, "ldc.offset2.1 r0.x, r0.x, 0"), /* ldc.1.mode0.base0 r0.x, r0.x, 0 */ - INSTR_6XX(c0260000_00478600, "ldc.offset3.1 r0.x, r0.x, 0"), /* ldc.1.mode0.base0 r0.x, r0.x, 0 */ + INSTR_6XX(c0260000_00478000, "ldc.offset0.1.imm r0.x, r0.x, 0"), /* ldc.1.mode0.base0 r0.x, r0.x, 0 */ + INSTR_6XX(c0260000_00478200, "ldc.offset1.1.imm r0.x, r0.x, 0"), /* ldc.1.mode0.base0 r0.x, r0.x, 0 */ + INSTR_6XX(c0260000_00478400, "ldc.offset2.1.imm r0.x, r0.x, 0"), /* ldc.1.mode0.base0 r0.x, r0.x, 0 */ + INSTR_6XX(c0260000_00478600, "ldc.offset3.1.imm r0.x, r0.x, 0"), /* ldc.1.mode0.base0 r0.x, r0.x, 0 */ /* dEQP-GLES31.functional.shaders.opaque_type_indexing.sampler.const_literal.fragment.sampler2d */ INSTR_6XX(a0c01f04_0cc00005, "sam (f32)(xyzw)r1.x, r0.z, s#6, t#6"),