From: Eric Anholt Date: Wed, 30 Nov 2011 16:52:54 +0000 (-0800) Subject: intel: Only prefer separate stencil when we can do HiZ. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5c9a55665d78b96bfb8ce8eab43b5558dd656a6d;p=mesa.git intel: Only prefer separate stencil when we can do HiZ. This required is_hiz_depth_format to start returning true on S8_Z24 as well, since that's the format we have here. The two previous callers are only calling it on non-depthstencil formats. This avoids us needing to have HiZ working on a new Z format immediately upon exposing the format (particularly painful for Z32_FLOAT_X24S8, which means all the fake packed depth/stencil paths). Reviewed-by: Chad Versace --- diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c index dd2e05a3669..c0a0b52434d 100644 --- a/src/mesa/drivers/dri/i965/brw_vtbl.c +++ b/src/mesa/drivers/dri/i965/brw_vtbl.c @@ -214,8 +214,16 @@ static void brw_invalidate_state( struct intel_context *intel, GLuint new_state static bool brw_is_hiz_depth_format(struct intel_context *intel, gl_format format) { - /* In the future, this will support Z_FLOAT32. */ - return intel->has_hiz && (format == MESA_FORMAT_X8_Z24); + if (!intel->has_hiz) + return false; + + switch (format) { + case MESA_FORMAT_X8_Z24: + case MESA_FORMAT_S8_Z24: + return true; + default: + return false; + } } void brwInitVtbl( struct brw_context *brw ) diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c index f8ef2625df3..3e4baa1bfb5 100644 --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c @@ -119,8 +119,10 @@ intel_miptree_create_internal(struct intel_context *intel, brw_miptree_layout(intel, mt); #endif - if (intel->has_separate_stencil && - _mesa_is_depthstencil_format(_mesa_get_format_base_format(format))) { + if (_mesa_is_depthstencil_format(_mesa_get_format_base_format(format)) && + (intel->must_use_separate_stencil || + (intel->has_separate_stencil && + intel->vtbl.is_hiz_depth_format(intel, format)))) { mt->stencil_mt = intel_miptree_create(intel, mt->target, MESA_FORMAT_S8,