From: Shriya Sharma Date: Tue, 26 Sep 2023 11:02:40 +0000 (+0100) Subject: Added brackets for lhzx instruction X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5cb4206cb4aebf5292736e519e52d95e13f9a335;p=openpower-isa.git Added brackets for lhzx instruction --- diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn index 30bcb3ef..5d3703ae 100644 --- a/openpower/isa/fixedload.mdwn +++ b/openpower/isa/fixedload.mdwn @@ -160,7 +160,7 @@ Description: Let the effective address (EA) be the sum (RA|0)+ (RB). The halfword in storage addressed by - EA is loaded into RT[48:63]. RT 0:47 are set to 0. + EA is loaded into RT[48:63]. RT[0:47] are set to 0. Special Registers Altered: