From: Kenneth Graunke <kenneth@whitecape.org>
Date: Wed, 14 May 2014 04:36:28 +0000 (-0700)
Subject: i965/fs: Rename c->sample_mask_reg to sample_mask_in_reg.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5cd7cf58e66ebb4e87a7fe6bba3b43f062ace47f;p=mesa.git

i965/fs: Rename c->sample_mask_reg to sample_mask_in_reg.

This is actually for gl_SampleMaskIn, which is quite different than
gl_SampleMask.  Renaming should help avoid confusion.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
---

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 7db5a456a53..ac257d6821a 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1337,7 +1337,7 @@ fs_visitor::emit_samplemaskin_setup(ir_variable *ir)
    assert(brw->gen >= 7);
    this->current_annotation = "compute gl_SampleMaskIn";
    fs_reg *reg = new(this->mem_ctx) fs_reg(this, ir->type);
-   emit(MOV(*reg, fs_reg(retype(brw_vec8_grf(c->sample_mask_reg, 0), BRW_REGISTER_TYPE_D))));
+   emit(MOV(*reg, fs_reg(retype(brw_vec8_grf(c->sample_mask_in_reg, 0), BRW_REGISTER_TYPE_D))));
    return reg;
 }
 
@@ -2861,7 +2861,7 @@ fs_visitor::setup_payload_gen6()
    /* R32: MSAA input coverage mask */
    if (fp->Base.SystemValuesRead & SYSTEM_BIT_SAMPLE_MASK_IN) {
       assert(brw->gen >= 7);
-      c->sample_mask_reg = c->nr_payload_regs;
+      c->sample_mask_in_reg = c->nr_payload_regs;
       c->nr_payload_regs++;
       if (dispatch_width == 16) {
          /* R33: input coverage mask if not SIMD8. */
diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index 871e34e1ac6..8ab0b079c5f 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -89,7 +89,7 @@ struct brw_wm_compile {
    uint8_t aa_dest_stencil_reg;
    uint8_t dest_depth_reg;
    uint8_t sample_pos_reg;
-   uint8_t sample_mask_reg;
+   uint8_t sample_mask_in_reg;
    uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
    uint8_t nr_payload_regs;
    GLuint source_depth_to_render_target:1;