From: Frank Ch. Eigler <fche@redhat.com>
Date: Mon, 10 Apr 2000 15:35:56 +0000 (+0000)
Subject: * arm abort fix
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5d0d395e944fab4b09a61baad2ef04c525767fcc;p=binutils-gdb.git

* arm abort fix

2000-03-11  Philip Blundell  <philb@gnu.org>

	* armemu.c (LoadSMult, LoadMult): Correct handling of aborts.
	Patch from Allan Skillman <Allan.Skillman@arm.com>.
---

diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog
index ce2a17e43f1..bb55ddd8f10 100644
--- a/sim/arm/ChangeLog
+++ b/sim/arm/ChangeLog
@@ -1,3 +1,8 @@
+2000-03-11  Philip Blundell  <philb@gnu.org>
+
+	* armemu.c (LoadSMult, LoadMult): Correct handling of aborts.
+	Patch from Allan Skillman <Allan.Skillman@arm.com>.
+
 Wed Mar 22 15:24:21 2000  glen mccready  <gkm@pobox.com>
 
 	* wrapper.c (sim_open,sim_close): Copy into myname, free myname.
diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c
index 83853f1599c..d890cda2594 100644
--- a/sim/arm/armemu.c
+++ b/sim/arm/armemu.c
@@ -3457,7 +3457,7 @@ LoadMult (ARMul_State * state, ARMword instr, ARMword address, ARMword WBBase)
 	  state->Aborted = ARMul_DataAbortV;
       }
 
-  if (BIT (15))
+  if (BIT (15) && !state->Aborted)
     {				/* PC is in the reg list */
 #ifdef MODE32
       state->Reg[15] = PC;
@@ -3520,13 +3520,13 @@ LoadSMult (ARMul_State * state, ARMword instr,
       {				/* load this register */
 	address += 4;
 	dest = ARMul_LoadWordS (state, address);
-	if (!state->abortSig || state->Aborted)
+	if (!state->abortSig && !state->Aborted)
 	  state->Reg[temp] = dest;
 	else if (!state->Aborted)
 	  state->Aborted = ARMul_DataAbortV;
       }
 
-  if (BIT (15))
+  if (BIT (15) && !state->Aborted)
     {				/* PC is in the reg list */
 #ifdef MODE32
       if (state->Mode != USER26MODE && state->Mode != USER32MODE)