From: Uros Bizjak <ubizjak@gmail.com>
Date: Tue, 29 May 2018 18:35:34 +0000 (+0200)
Subject: re PR target/85950 (Unsafe-math-optimizations regresses optimization using SSE4.1... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5d2e68ea0afc4dbb3fda7679c19749a0a5dd6def;p=gcc.git

re PR target/85950 (Unsafe-math-optimizations regresses optimization using SSE4.1 roundss)

	PR target/85950
	* config/i386/i386.md (l<rounding_insn><MODEF:mode><SWI48:mode>2):
	Enable for TARGET_SSE4_1 and generate rounds{s,d} and cvtts{s,d}2si{,q}
	sequence.
	(sse4_1_round<mode>2): Use nonimmediate_operand
	for operand 1 predicate.

testsuite/ChangeLog:

	PR target/85950
	* gcc.target/i386/pr85950.c: New test.

From-SVN: r260903
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 31144af9672..63b744711e8 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2018-05-29  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/85950
+	* config/i386/i386.md (l<rounding_insn><MODEF:mode><SWI48:mode>2):
+	Enable for TARGET_SSE4_1 and generate rounds{s,d} and cvtts{s,d}2si{,q}
+	sequence.
+	(sse4_1_round<mode>2): Use nonimmediate_operand
+	for operand 1 predicate.
+
 2018-05-29  Martin Sebor  <msebor@redhat.com>
 	    Richard Biener  <rguenther@suse.de>
 
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 209bf3f97f4..8337c613b4e 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -16657,7 +16657,7 @@
 
 (define_insn "sse4_1_round<mode>2"
   [(set (match_operand:MODEF 0 "register_operand" "=x,v")
-	(unspec:MODEF [(match_operand:MODEF 1 "register_operand" "x,v")
+	(unspec:MODEF [(match_operand:MODEF 1 "nonimmediate_operand" "xm,vm")
 		       (match_operand:SI 2 "const_0_to_15_operand" "n,n")]
 		      UNSPEC_ROUND))]
   "TARGET_SSE4_1"
@@ -17253,12 +17253,19 @@
 				 FIST_ROUNDING))
 	      (clobber (reg:CC FLAGS_REG))])]
   "SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH
-   && !flag_trapping_math"
+   && (TARGET_SSE4_1 || !flag_trapping_math)"
 {
-  if (TARGET_64BIT && optimize_insn_for_size_p ())
-    FAIL;
+  if (TARGET_SSE4_1)
+    {
+      rtx tmp = gen_reg_rtx (<MODEF:MODE>mode);
 
-  if (ROUND_<ROUNDING> == ROUND_FLOOR)
+      emit_insn (gen_sse4_1_round<mode>2
+		 (tmp, operands[1], GEN_INT (ROUND_<ROUNDING>
+					     | ROUND_NO_EXC)));
+      emit_insn (gen_fix_trunc<MODEF:mode><SWI48:mode>2
+		 (operands[0], tmp));
+    }
+  else if (ROUND_<ROUNDING> == ROUND_FLOOR)
     ix86_expand_lfloorceil (operands[0], operands[1], true);
   else if (ROUND_<ROUNDING> == ROUND_CEIL)
     ix86_expand_lfloorceil (operands[0], operands[1], false);
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 83f16eec480..f1c217960af 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2018-05-29  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/85950
+	* gcc.target/i386/pr85950.c: New test.
+
 2018-05-29  Marek Polacek  <polacek@redhat.com>
 
 	PR c++/85883
diff --git a/gcc/testsuite/gcc.target/i386/pr85950.c b/gcc/testsuite/gcc.target/i386/pr85950.c
new file mode 100644
index 00000000000..dff25e57bd8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr85950.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse4.1 -mfpmath=sse" } */
+
+double floor (double);
+double ceil (double);
+
+int ifloor (double x) { return floor (x); }
+int iceil (double x) { return ceil (x); }
+
+#ifdef __x86_64__
+long long llfloor (double x) { return floor (x); }
+long long llceil (double x) { return ceil (x); }
+#endif
+  
+/* { dg-final { scan-assembler-times "roundsd" 2 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "roundsd" 4 { target { ! ia32 } } } } */