From: lkcl <lkcl@web>
Date: Mon, 2 Aug 2021 15:31:27 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~529
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5d389ca0b1bb371a7624eebdb5d8b1d7a1155158;p=libreriscv.git

---

diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn
index d48a2cdf7..01661e485 100644
--- a/openpower/sv/branches.mdwn
+++ b/openpower/sv/branches.mdwn
@@ -83,7 +83,8 @@ SVP64 RM `MODE` for Branch Conditional:
 | 00  | SNZ |  ALL sz | normal mode                      |
 | 01  | VLI |  ALL sz | VLSET mode                      |
 | 10  | SNZ |  ALL sz | svstep mode                      |
-| 11  | VLI |  ALL sz | svstep VLSET mode                      |
+| 11  | VLI |  ALL sz | svstep VLSET mode, in Horizontal-First        |
+| 11  | VLI |  SNZ sz | svstep VLSET mode, in Vertical-First    |
 
 Fields: