From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 21 May 2020 19:27:12 +0000 (+0100)
Subject: argh syntax error
X-Git-Tag: div_pipeline~969
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5d68c383a1b27826e73a63fc8eccc394e3865fd2;p=soc.git

argh syntax error
---

diff --git a/src/soc/fu/cr/pipe_data.py b/src/soc/fu/cr/pipe_data.py
index a944d080..4066ae09 100644
--- a/src/soc/fu/cr/pipe_data.py
+++ b/src/soc/fu/cr/pipe_data.py
@@ -8,7 +8,7 @@ class CRInputData(IntegerData):
     regspec = [('INT', 'a', '0:63'),      # 64 bit range
                ('CR', 'full_cr', '0:31'), # 32 bit range
                ('CR', 'cr_a', '0:3'),     # 4 bit range
-               ('CR', 'cr_b', '0:3')]     # 4 bit range
+               ('CR', 'cr_b', '0:3'),     # 4 bit range
                ('CR', 'cr_c', '0:3')]     # 4 bit range
     def __init__(self, pspec):
         super().__init__(pspec)