From: Segher Boessenkool Date: Thu, 7 Jul 2016 03:09:03 +0000 (+0200) Subject: rs6000: Make the ctr* patterns allow ints in vector regs (PR71763) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5ddaee94e247a189a8a17af7dce8d45e0c30adee;p=gcc.git rs6000: Make the ctr* patterns allow ints in vector regs (PR71763) Similar to PR70098, which is about integers in floating point registers, we can have the completely analogous problem with vector registers as well now that we allow integers in vector registers. So, this patch solves it in the same way. This only works for targets with direct move. To recap: register allocation can decide to put an integer mode value in a floating point or vector register. If that register is used in a bd*z instruction, which is a jump instruction, reload can not do an output reload on it (it does not do output reloads on any jump insns), so the float or vector register will remain, and we have to allow it here or recog will ICE. Later on we will split this to valid instructions, including a move from that fp/vec register to an int register; it is this move that will still fail (PR70098) if we do not have direct move enabled. PR target/70098 PR target/71763 * config/rs6000/rs6000.md (*ctr_internal1, *ctr_internal2, *ctr_internal5, *ctr_internal6): Add *wi to the output constraint. gcc/testsuite/ PR target/70098 PR target/71763 * gcc.target/powerpc/pr71763.c: New file. From-SVN: r238076 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 48edbc59810..cbb4dcf4936 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2016-07-06 Segher Boessenkool + + PR target/70098 + PR target/71763 + * config/rs6000/rs6000.md (*ctr_internal1, *ctr_internal2, + *ctr_internal5, *ctr_internal6): Add *wi to the output + constraint. + 2016-07-06 Trevor Saunders * var-tracking.c (struct adjust_mem_data): Make side_effects a vector. diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 46f73823392..7d9c6600f2a 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -12202,7 +12202,7 @@ (const_int 1)) (label_ref (match_operand 0 "" "")) (pc))) - (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l") + (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l") (plus:P (match_dup 1) (const_int -1))) (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) @@ -12226,7 +12226,7 @@ (const_int 1)) (pc) (label_ref (match_operand 0 "" "")))) - (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l") + (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l") (plus:P (match_dup 1) (const_int -1))) (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) @@ -12252,7 +12252,7 @@ (const_int 1)) (label_ref (match_operand 0 "" "")) (pc))) - (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l") + (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l") (plus:P (match_dup 1) (const_int -1))) (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) @@ -12276,7 +12276,7 @@ (const_int 1)) (pc) (label_ref (match_operand 0 "" "")))) - (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l") + (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l") (plus:P (match_dup 1) (const_int -1))) (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index fa5f1c16945..ad8cf4a8fa3 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2016-07-06 Segher Boessenkool + + PR target/70098 + PR target/71763 + * gcc.target/powerpc/pr71763.c: New file. + 2016-07-06 Yuri Rumyantsev PR tree-optimization/71518 diff --git a/gcc/testsuite/gcc.target/powerpc/pr71763.c b/gcc/testsuite/gcc.target/powerpc/pr71763.c new file mode 100644 index 00000000000..7910a90b988 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr71763.c @@ -0,0 +1,27 @@ +// PR target/71763 +// { dg-do compile } +// { dg-options "-O1 -mvsx" } +// { dg-xfail-if "PR70098" { lp64 && powerpc64_no_dm } } +// { dg-prune-output ".*internal compiler error.*" } + +int a, b; +float c; + +void fn2(void); + +void fn1(void) +{ + long d; + + for (d = 3; d; d--) { + for (a = 0; a <= 1; a++) { + b &= 1; + if (b) { + for (;;) { + fn2(); + c = d; + } + } + } + } +}