From: Jeff Wang <jjj11x@gmail.com>
Date: Thu, 16 Jan 2020 22:17:42 +0000 (-0500)
Subject: allow enum typedefs
X-Git-Tag: working-ls180~791^2~11
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5ddf84d430a176acf5ab638a86c84484277bee84;p=yosys.git

allow enum typedefs
---

diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y
index 66dcf1fec..08db36276 100644
--- a/frontends/verilog/verilog_parser.y
+++ b/frontends/verilog/verilog_parser.y
@@ -1523,7 +1523,12 @@ typedef_decl:
 
 		ast_stack.back()->children.push_back(new AstNode(AST_TYPEDEF, astbuf1));
 		ast_stack.back()->children.back()->str = *$4;
-	};
+	} |
+	TOK_TYPEDEF enum_type TOK_ID ';' {
+		ast_stack.back()->children.push_back(new AstNode(AST_TYPEDEF, astbuf1));
+		ast_stack.back()->children.back()->str = *$3;
+	}
+	;
 
 cell_stmt:
 	attr TOK_ID {