From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 5 Jul 2022 13:02:29 +0000 (+0100)
Subject: take deepcopy of regs passed in to avoid accidental modification
X-Git-Tag: sv_maxu_works-initial~301
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5e60e459929ff9e149f256490ab40c0424143efd;p=openpower-isa.git

take deepcopy of regs passed in to avoid accidental modification
---

diff --git a/src/openpower/test/state.py b/src/openpower/test/state.py
index ee884f81..f8eae648 100644
--- a/src/openpower/test/state.py
+++ b/src/openpower/test/state.py
@@ -27,6 +27,7 @@ from openpower.decoder.isa.radixmmu import RADIX
 from openpower.util import log
 import os
 import sys
+from copy import deepcopy
 
 global staterunner_factory
 staterunner_factory = {}
@@ -242,13 +243,13 @@ class ExpectedState(State):
             int_regs = 32
         if isinstance(int_regs, int):
             int_regs = [0] * int_regs
-        self.intregs = int_regs
+        self.intregs = deepcopy(int_regs)
         self.pc = pc
         if crregs is None:
             crregs = 8
         if isinstance(crregs, int):
             crregs = [0] * crregs
-        self.crregs = crregs
+        self.crregs = deepcopy(crregs)
         self.so = so
         self.ov = ov
         self.ca = ca