From: Jacob Lifshay Date: Mon, 7 Aug 2023 23:04:00 +0000 (-0700) Subject: split out instructions from openpower/isa/fpstore.mdwn X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5ebc6d023a85595b36077059209e8c2af8766f35;p=openpower-isa.git split out instructions from openpower/isa/fpstore.mdwn --- diff --git a/openpower/isa/fpstore.mdwn b/openpower/isa/fpstore.mdwn index d9596c2f..7a6544d3 100644 --- a/openpower/isa/fpstore.mdwn +++ b/openpower/isa/fpstore.mdwn @@ -2,142 +2,20 @@ -# Store Floating-Point Single +[[!inline pagenames="openpower/isa/fpstore/stfs" raw="yes"]] -D-Form +[[!inline pagenames="openpower/isa/fpstore/stfsx" raw="yes"]] -* stfs FRS,D(RA) +[[!inline pagenames="openpower/isa/fpstore/stfsu" raw="yes"]] -Pseudo-code: +[[!inline pagenames="openpower/isa/fpstore/stfsux" raw="yes"]] - EA <- (RA|0) + EXTS(D) - MEM(EA, 4)<- SINGLE( (FRS) ) +[[!inline pagenames="openpower/isa/fpstore/stfd" raw="yes"]] -Special Registers Altered: +[[!inline pagenames="openpower/isa/fpstore/stfdx" raw="yes"]] - None +[[!inline pagenames="openpower/isa/fpstore/stfdu" raw="yes"]] -# Store Floating-Point Single Indexed +[[!inline pagenames="openpower/isa/fpstore/stfdux" raw="yes"]] -X-Form - -* stfsx FRS,RA,RB - -Pseudo-code: - - EA <- (RA|0) + (RB) - MEM(EA, 4)<- SINGLE( (FRS) ) - -Special Registers Altered: - - None - -# Store Floating-Point Single with Update - -D-Form - -* stfsu FRS,D(RA) - -Pseudo-code: - - EA <- (RA) + EXTS(D) - MEM(EA, 4)<- SINGLE( (FRS) ) - RA <- EA - -Special Registers Altered: - - None - -# Store Floating-Point Single with Update Indexed - -X-Form - -* stfsux FRS,RA,RB - -Pseudo-code: - - EA <- (RA) + (RB) - MEM(EA, 4)<- SINGLE( (FRS) ) - RA <- EA - -Special Registers Altered: - - None - -# Store Floating-Point Double - -D-Form - -* stfd FRS,D(RA) - -Pseudo-code: - - EA <- (RA|0) + EXTS(D) - MEM(EA, 8)<- (FRS) - -Special Registers Altered: - - None - -# Store Floating-Point Double Indexed - -X-Form - -* stfdx FRS,RA,RB - -Pseudo-code: - - EA <- (RA|0) + (RB) - MEM(EA, 8)<- (FRS) - -Special Registers Altered: - - None - -# Store Floating-Point Double with Update - -D-Form - -* stfdu FRS,D(RA) - -Pseudo-code: - - EA <- (RA) + EXTS(D) - MEM(EA, 8)<- (FRS) - RA <- EA - -Special Registers Altered: - - None - -# Store Floating-Point Double with Update Indexed - -X-Form - -* stfdux FRS,RA,RB - -Pseudo-code: - - EA <- (RA) + (RB) - MEM(EA, 8)<- (FRS) - RA <- EA - -Special Registers Altered: - - None - -# Store Floating-Point as Integer Word Indexed - -X-Form - -* stfiwx FRS,RA,RB - -Pseudo-code: - - b <- (RA|0) - EA <- b + (RB) - MEM(EA, 8)<- (FRS)[32:63] - -Special Registers Altered: - - None +[[!inline pagenames="openpower/isa/fpstore/stfiwx" raw="yes"]] diff --git a/openpower/isa/fpstore/stfd.mdwn b/openpower/isa/fpstore/stfd.mdwn new file mode 100644 index 00000000..1a4f0f0e --- /dev/null +++ b/openpower/isa/fpstore/stfd.mdwn @@ -0,0 +1,13 @@ +# Store Floating-Point Double + +D-Form + +* stfd FRS,D(RA) + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpstore/stfd_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpstore/stfd_code.mdwn b/openpower/isa/fpstore/stfd_code.mdwn new file mode 100644 index 00000000..96820dd5 --- /dev/null +++ b/openpower/isa/fpstore/stfd_code.mdwn @@ -0,0 +1,2 @@ + EA <- (RA|0) + EXTS(D) + MEM(EA, 8)<- (FRS) diff --git a/openpower/isa/fpstore/stfdu.mdwn b/openpower/isa/fpstore/stfdu.mdwn new file mode 100644 index 00000000..3227b799 --- /dev/null +++ b/openpower/isa/fpstore/stfdu.mdwn @@ -0,0 +1,13 @@ +# Store Floating-Point Double with Update + +D-Form + +* stfdu FRS,D(RA) + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpstore/stfdu_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpstore/stfdu_code.mdwn b/openpower/isa/fpstore/stfdu_code.mdwn new file mode 100644 index 00000000..22b15df5 --- /dev/null +++ b/openpower/isa/fpstore/stfdu_code.mdwn @@ -0,0 +1,3 @@ + EA <- (RA) + EXTS(D) + MEM(EA, 8)<- (FRS) + RA <- EA diff --git a/openpower/isa/fpstore/stfdux.mdwn b/openpower/isa/fpstore/stfdux.mdwn new file mode 100644 index 00000000..ea46a991 --- /dev/null +++ b/openpower/isa/fpstore/stfdux.mdwn @@ -0,0 +1,13 @@ +# Store Floating-Point Double with Update Indexed + +X-Form + +* stfdux FRS,RA,RB + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpstore/stfdux_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpstore/stfdux_code.mdwn b/openpower/isa/fpstore/stfdux_code.mdwn new file mode 100644 index 00000000..8b615791 --- /dev/null +++ b/openpower/isa/fpstore/stfdux_code.mdwn @@ -0,0 +1,3 @@ + EA <- (RA) + (RB) + MEM(EA, 8)<- (FRS) + RA <- EA diff --git a/openpower/isa/fpstore/stfdx.mdwn b/openpower/isa/fpstore/stfdx.mdwn new file mode 100644 index 00000000..3c398566 --- /dev/null +++ b/openpower/isa/fpstore/stfdx.mdwn @@ -0,0 +1,13 @@ +# Store Floating-Point Double Indexed + +X-Form + +* stfdx FRS,RA,RB + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpstore/stfdx_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpstore/stfdx_code.mdwn b/openpower/isa/fpstore/stfdx_code.mdwn new file mode 100644 index 00000000..03022bae --- /dev/null +++ b/openpower/isa/fpstore/stfdx_code.mdwn @@ -0,0 +1,2 @@ + EA <- (RA|0) + (RB) + MEM(EA, 8)<- (FRS) diff --git a/openpower/isa/fpstore/stfiwx.mdwn b/openpower/isa/fpstore/stfiwx.mdwn new file mode 100644 index 00000000..78922b7f --- /dev/null +++ b/openpower/isa/fpstore/stfiwx.mdwn @@ -0,0 +1,13 @@ +# Store Floating-Point as Integer Word Indexed + +X-Form + +* stfiwx FRS,RA,RB + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpstore/stfiwx_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpstore/stfiwx_code.mdwn b/openpower/isa/fpstore/stfiwx_code.mdwn new file mode 100644 index 00000000..cac263a4 --- /dev/null +++ b/openpower/isa/fpstore/stfiwx_code.mdwn @@ -0,0 +1,3 @@ + b <- (RA|0) + EA <- b + (RB) + MEM(EA, 8)<- (FRS)[32:63] diff --git a/openpower/isa/fpstore/stfs.mdwn b/openpower/isa/fpstore/stfs.mdwn new file mode 100644 index 00000000..d64593f1 --- /dev/null +++ b/openpower/isa/fpstore/stfs.mdwn @@ -0,0 +1,13 @@ +# Store Floating-Point Single + +D-Form + +* stfs FRS,D(RA) + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpstore/stfs_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpstore/stfs_code.mdwn b/openpower/isa/fpstore/stfs_code.mdwn new file mode 100644 index 00000000..6e76015d --- /dev/null +++ b/openpower/isa/fpstore/stfs_code.mdwn @@ -0,0 +1,2 @@ + EA <- (RA|0) + EXTS(D) + MEM(EA, 4)<- SINGLE( (FRS) ) diff --git a/openpower/isa/fpstore/stfsu.mdwn b/openpower/isa/fpstore/stfsu.mdwn new file mode 100644 index 00000000..eefba739 --- /dev/null +++ b/openpower/isa/fpstore/stfsu.mdwn @@ -0,0 +1,13 @@ +# Store Floating-Point Single with Update + +D-Form + +* stfsu FRS,D(RA) + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpstore/stfsu_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpstore/stfsu_code.mdwn b/openpower/isa/fpstore/stfsu_code.mdwn new file mode 100644 index 00000000..7f73b829 --- /dev/null +++ b/openpower/isa/fpstore/stfsu_code.mdwn @@ -0,0 +1,3 @@ + EA <- (RA) + EXTS(D) + MEM(EA, 4)<- SINGLE( (FRS) ) + RA <- EA diff --git a/openpower/isa/fpstore/stfsux.mdwn b/openpower/isa/fpstore/stfsux.mdwn new file mode 100644 index 00000000..0e02f669 --- /dev/null +++ b/openpower/isa/fpstore/stfsux.mdwn @@ -0,0 +1,13 @@ +# Store Floating-Point Single with Update Indexed + +X-Form + +* stfsux FRS,RA,RB + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpstore/stfsux_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpstore/stfsux_code.mdwn b/openpower/isa/fpstore/stfsux_code.mdwn new file mode 100644 index 00000000..c988cbed --- /dev/null +++ b/openpower/isa/fpstore/stfsux_code.mdwn @@ -0,0 +1,3 @@ + EA <- (RA) + (RB) + MEM(EA, 4)<- SINGLE( (FRS) ) + RA <- EA diff --git a/openpower/isa/fpstore/stfsx.mdwn b/openpower/isa/fpstore/stfsx.mdwn new file mode 100644 index 00000000..14f4f7e8 --- /dev/null +++ b/openpower/isa/fpstore/stfsx.mdwn @@ -0,0 +1,13 @@ +# Store Floating-Point Single Indexed + +X-Form + +* stfsx FRS,RA,RB + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpstore/stfsx_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpstore/stfsx_code.mdwn b/openpower/isa/fpstore/stfsx_code.mdwn new file mode 100644 index 00000000..3372e66b --- /dev/null +++ b/openpower/isa/fpstore/stfsx_code.mdwn @@ -0,0 +1,2 @@ + EA <- (RA|0) + (RB) + MEM(EA, 4)<- SINGLE( (FRS) )