From: whitequark <cz@m-labs.hk>
Date: Wed, 3 Jul 2019 13:24:00 +0000 (+0000)
Subject: compat.fhdl.specials: fix Memory.get_port() after 94e8f479.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5ec519708ea3aa13dd658dbd7153651982f3caca;p=nmigen.git

compat.fhdl.specials: fix Memory.get_port() after 94e8f479.

This also makes sure the native ports are instantiated for correct
clock domain.
---

diff --git a/nmigen/compat/fhdl/specials.py b/nmigen/compat/fhdl/specials.py
index 1aef667..c18c14e 100644
--- a/nmigen/compat/fhdl/specials.py
+++ b/nmigen/compat/fhdl/specials.py
@@ -98,12 +98,13 @@ class CompatMemory(NativeMemory):
                           DeprecationWarning, stacklevel=1)
             we_granularity = None
         assert mode != NO_CHANGE
-        rdport = self.read_port(synchronous=not async_read, transparent=mode == WRITE_FIRST)
+        rdport = self.read_port(domain="comb" if async_read else clock_domain,
+                                transparent=mode == WRITE_FIRST)
         rdport.addr.name = "{}_addr".format(self.name)
         adr = rdport.addr
         dat_r = rdport.data
         if write_capable:
-            wrport = self.write_port(granularity=we_granularity)
+            wrport = self.write_port(domain=clock_domain, granularity=we_granularity)
             wrport.addr = rdport.addr
             we = wrport.en
             dat_w = wrport.data