From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Thu, 7 Dec 2023 19:54:19 +0000 (+0000)
Subject: added the expected results for scalar ddffirst
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5f2085955c5e19eb87602faeac68868169e10d2d;p=openpower-isa.git

added the expected results for scalar ddffirst
---

diff --git a/src/openpower/decoder/isa/test_caller_svp64_dd_ffirst.py b/src/openpower/decoder/isa/test_caller_svp64_dd_ffirst.py
index 67c36010..9085220d 100644
--- a/src/openpower/decoder/isa/test_caller_svp64_dd_ffirst.py
+++ b/src/openpower/decoder/isa/test_caller_svp64_dd_ffirst.py
@@ -43,19 +43,20 @@ class DDFFirstTestCase(FHDLTestCase):
 
         # SVSTATE
         svstate = SVP64State()
-        svstate.vl = 4  # VL
-        svstate.maxvl = 4  # MAXVL
+        vl = 3  # VL
+        svstate.vl = vl  # VL
+        svstate.maxvl = vl  # MAXVL
         print("SVSTATE", bin(svstate.asint()))
 
-        gprs = [0] * 64
-        gprs[10] = 5
-        gprs[11] = 6
+        gprs = [0] * 32
+        gprs[10] = 4
+        gprs[11] = 5
+        gprs[12] = 12
 
         res = []
-        cr_res = []
-        # store GPRs
-        for i, x in enumerate(vec):
-            gprs[i] = x
+        cr_res = [0]*8
+
+        newvl = sv_cmpi(gprs, cr_res, vl, 10, 5)
 
         with Program(lst, bigendian=False) as program:
             sim = self.run_tst_program(program, initial_regs=gprs,