From: lkcl Date: Sat, 29 Jun 2019 11:07:59 +0000 (+0100) Subject: (no commit message) X-Git-Tag: convert-csv-opcode-to-binary~4343 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5f2db075392816319615287e6a55d834f9eeea23;p=libreriscv.git --- diff --git a/simple_v_extension/sv_prefix_proposal/discussion.rst b/simple_v_extension/sv_prefix_proposal/discussion.rst index 2d166b520..299832af8 100644 --- a/simple_v_extension/sv_prefix_proposal/discussion.rst +++ b/simple_v_extension/sv_prefix_proposal/discussion.rst @@ -264,24 +264,24 @@ experiment 1: experiment 2: -+-----------+-------------+------------+--------------+------------+----------------------+ -| VLtyp[11] | VLtyp[10:6] | VLtyp[5] | VLtyp[4:3] | VLtyp[2:0] | comment | -+-----------+-------------+------------+--------------+------------+----------------------+ -| 0 | 00000 | 0 00 | 000 | no change to VL/MVL | -+-----------+-------------+---------------------------+------------+----------------------+ -| 0 | imm | 000 | rs'!=0 | sv.setvl immed mode | -+-----------+-------------+---------------------------+------------+----------------------+ -| 0 | imm | rd'!=0 | 000 | not sure. reserved? | -+-----------+-------------+---------------------------+------------+----------------------+ -| 0 | imm | rd'!=0 | rs'!=0 | sv.setvl rd, rs, MVL | -+-----------+-------------+------------+--------------+------------+----------------------+ -| 1 | imm | 0 | 00 000 | set MVL immed | -+-----------+-------------+------------+---------------------------+----------------------+ -| 1 | imm | 0 | rd[4:0] | sv.setvl rd, immed | -+-----------+-------------+------------+---------------------------+----------------------+ -| 1 | imm | 1 | 00 000 | something. reserved? | -+-----------+-------------+------------+---------------------------+----------------------+ -| 1 | imm | 1 | rs1[4:0] | set MVL rs1? | -+-----------+-------------+------------+---------------------------+----------------------+ - - ++-----------+-------------+------------+--------------+------------+-----------------------------------------------+ +| VLtyp[11] | VLtyp[10:6] | VLtyp[5] | VLtyp[4:3] | VLtyp[2:0] | comment | ++-----------+-------------+------------+--------------+------------+-----------------------------------------------+ +| 0 | 00000 | 0 00 | 000 | no change to VL/MVL | ++-----------+-------------+---------------------------+------------+-----------------------------------------------+ +| 0 | imm | 000 | rs'!=0 | MVL = imm; vl = min(r[rs'], MVL) | ++-----------+-------------+---------------------------+------------+-----------------------------------------------+ +| 0 | imm | rd'!=0 | 000 | MVL = imm; vl = MVL; r[rd'] = vl | ++-----------+-------------+---------------------------+------------+-----------------------------------------------+ +| 0 | imm | rd'!=0 | rs'!=0 | MVL = imm; vl = min(r[rs'], MVL); r[rd'] = vl | ++-----------+-------------+------------+--------------+------------+-----------------------------------------------+ +| 1 | imm | 0 | 00 000 | MVL = imm; vl = MVL; | ++-----------+-------------+------------+---------------------------+-----------------------------------------------+ +| 1 | imm | 0 | rd[4:0] | MVL = imm; vl = MVL; r[rd] = vl | ++-----------+-------------+------------+---------------------------+-----------------------------------------------+ +| 1 | imm | 1 | 00 000 | reserved | ++-----------+-------------+------------+---------------------------+-----------------------------------------------+ +| 1 | imm | 1 | rs1[4:0] | MVL = imm; vl = min(r[rs], MVL) | ++-----------+-------------+------------+---------------------------+-----------------------------------------------+ + +interestingly, "VLtyp[11] = 0" fits the sv.setvl pseudcode really well.