From: Kenneth Graunke Date: Tue, 25 Nov 2014 08:35:31 +0000 (-0800) Subject: i965: Delete brw_state_flags::cache and related code. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5f34a18f96e58aff1aca2d2971fca1c91dc6931d;p=mesa.git i965: Delete brw_state_flags::cache and related code. It's been merged into brw_state_flags::brw for simplicity and efficiency. Signed-off-by: Kenneth Graunke Reviewed-by: Kristian Høgsberg Reviewed-by: Matt Turner --- diff --git a/src/mesa/drivers/dri/i965/brw_binding_tables.c b/src/mesa/drivers/dri/i965/brw_binding_tables.c index 7ffd7b2e5d1..ea82e717e72 100644 --- a/src/mesa/drivers/dri/i965/brw_binding_tables.c +++ b/src/mesa/drivers/dri/i965/brw_binding_tables.c @@ -195,7 +195,6 @@ const struct brw_tracked_state brw_binding_table_pointers = { BRW_NEW_PS_BINDING_TABLE | BRW_NEW_STATE_BASE_ADDRESS | BRW_NEW_VS_BINDING_TABLE, - .cache = 0, }, .emit = gen4_upload_binding_table_pointers, }; @@ -232,7 +231,6 @@ const struct brw_tracked_state gen6_binding_table_pointers = { BRW_NEW_PS_BINDING_TABLE | BRW_NEW_STATE_BASE_ADDRESS | BRW_NEW_VS_BINDING_TABLE, - .cache = 0, }, .emit = gen6_upload_binding_table_pointers, }; diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index 20ce7b7c202..df00b772135 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp @@ -277,7 +277,6 @@ retry: * rendering tracks for GL. */ brw->state.dirty.brw = ~0ull; - brw->state.dirty.cache = ~0; brw->no_depth_or_stencil = false; brw->ib.type = -1; diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c index 01974e1ab6d..02f5a3a76fb 100644 --- a/src/mesa/drivers/dri/i965/brw_cc.c +++ b/src/mesa/drivers/dri/i965/brw_cc.c @@ -77,7 +77,6 @@ const struct brw_tracked_state brw_cc_vp = { .mesa = _NEW_TRANSFORM | _NEW_VIEWPORT, .brw = BRW_NEW_BATCH, - .cache = 0 }, .emit = brw_upload_cc_vp }; @@ -250,7 +249,6 @@ const struct brw_tracked_state brw_cc_unit = { .brw = BRW_NEW_BATCH | BRW_NEW_CC_VP | BRW_NEW_STATS_WM, - .cache = 0 }, .emit = upload_cc_unit, }; @@ -272,7 +270,6 @@ const struct brw_tracked_state brw_blend_constant_color = { .dirty = { .mesa = _NEW_COLOR, .brw = BRW_NEW_CONTEXT, - .cache = 0 }, .emit = upload_blend_constant_color }; diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index e678bde4599..ec4b3dd88b1 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -287,15 +287,6 @@ struct brw_state_flags { * State update flags signalled as the result of brw_tracked_state updates */ uint64_t brw; - /** - * State update flags that used to be signalled by brw_state_cache.c - * searches. - * - * Now almost all of that state is just streamed out on demand, but the - * flags for those state blobs updating have stayed in the same bitfield. - * brw_state_cache.c still flags BRW_NEW_*_PROG_DATA. - */ - GLuint cache; }; /** Subclass of Mesa vertex program */ @@ -740,8 +731,7 @@ struct brw_gs_prog_data struct brw_cache_item { /** * Effectively part of the key, cache_id identifies what kind of state - * buffer is involved, and also which brw->state.dirty.cache flag should - * be set when this cache item is chosen. + * buffer is involved, and also which dirty flag should set. */ enum brw_cache_id cache_id; /** 32-bit hash of the key data */ diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c index 4ff5815295c..6e0cf3e353f 100644 --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c @@ -952,7 +952,6 @@ const struct brw_tracked_state brw_indices = { .dirty = { .mesa = 0, .brw = BRW_NEW_INDICES, - .cache = 0, }, .emit = brw_upload_indices, }; @@ -990,7 +989,6 @@ const struct brw_tracked_state brw_index_buffer = { .mesa = 0, .brw = BRW_NEW_BATCH | BRW_NEW_INDEX_BUFFER, - .cache = 0, }, .emit = brw_emit_index_buffer, }; diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index d4b6e7c8c26..a405eb25f65 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -64,7 +64,6 @@ const struct brw_tracked_state brw_drawing_rect = { .dirty = { .mesa = _NEW_BUFFERS, .brw = BRW_NEW_CONTEXT, - .cache = 0 }, .emit = upload_drawing_rect }; @@ -702,7 +701,6 @@ const struct brw_tracked_state brw_depthbuffer = { .dirty = { .mesa = _NEW_BUFFERS, .brw = BRW_NEW_BATCH, - .cache = 0, }, .emit = brw_emit_depthbuffer, }; @@ -751,7 +749,6 @@ const struct brw_tracked_state brw_polygon_stipple = { .mesa = _NEW_POLYGON | _NEW_POLYGONSTIPPLE, .brw = BRW_NEW_CONTEXT, - .cache = 0 }, .emit = upload_polygon_stipple }; @@ -795,7 +792,6 @@ const struct brw_tracked_state brw_polygon_stipple_offset = { .mesa = _NEW_BUFFERS | _NEW_POLYGON, .brw = BRW_NEW_CONTEXT, - .cache = 0 }, .emit = upload_polygon_stipple_offset }; @@ -829,7 +825,6 @@ const struct brw_tracked_state brw_aa_line_parameters = { .dirty = { .mesa = _NEW_LINE, .brw = BRW_NEW_CONTEXT, - .cache = 0 }, .emit = upload_aa_line_parameters }; @@ -874,7 +869,6 @@ const struct brw_tracked_state brw_line_stipple = { .dirty = { .mesa = _NEW_LINE, .brw = BRW_NEW_CONTEXT, - .cache = 0 }, .emit = upload_line_stipple }; @@ -932,7 +926,6 @@ const struct brw_tracked_state brw_invariant_state = { .dirty = { .mesa = 0, .brw = BRW_NEW_CONTEXT, - .cache = 0 }, .emit = brw_upload_invariant_state }; @@ -1056,7 +1049,6 @@ const struct brw_tracked_state brw_state_base_address = { .mesa = 0, .brw = BRW_NEW_BATCH | BRW_NEW_PROGRAM_CACHE, - .cache = 0, }, .emit = upload_state_base_address }; diff --git a/src/mesa/drivers/dri/i965/brw_primitive_restart.c b/src/mesa/drivers/dri/i965/brw_primitive_restart.c index f7764e15e2c..2c7a7e8b8dd 100644 --- a/src/mesa/drivers/dri/i965/brw_primitive_restart.c +++ b/src/mesa/drivers/dri/i965/brw_primitive_restart.c @@ -211,7 +211,6 @@ const struct brw_tracked_state haswell_cut_index = { .dirty = { .mesa = _NEW_TRANSFORM, .brw = BRW_NEW_INDEX_BUFFER, - .cache = 0, }, .emit = haswell_upload_cut_index, }; diff --git a/src/mesa/drivers/dri/i965/brw_sampler_state.c b/src/mesa/drivers/dri/i965/brw_sampler_state.c index 9c5e45c7eb2..0fe08534203 100644 --- a/src/mesa/drivers/dri/i965/brw_sampler_state.c +++ b/src/mesa/drivers/dri/i965/brw_sampler_state.c @@ -529,7 +529,6 @@ const struct brw_tracked_state brw_fs_samplers = { .mesa = _NEW_TEXTURE, .brw = BRW_NEW_BATCH | BRW_NEW_FRAGMENT_PROGRAM, - .cache = 0 }, .emit = brw_upload_fs_samplers, }; @@ -548,7 +547,6 @@ const struct brw_tracked_state brw_vs_samplers = { .mesa = _NEW_TEXTURE, .brw = BRW_NEW_BATCH | BRW_NEW_VERTEX_PROGRAM, - .cache = 0 }, .emit = brw_upload_vs_samplers, }; @@ -571,7 +569,6 @@ const struct brw_tracked_state brw_gs_samplers = { .mesa = _NEW_TEXTURE, .brw = BRW_NEW_BATCH | BRW_NEW_GEOMETRY_PROGRAM, - .cache = 0 }, .emit = brw_upload_gs_samplers, }; diff --git a/src/mesa/drivers/dri/i965/brw_sf_state.c b/src/mesa/drivers/dri/i965/brw_sf_state.c index 3306fb5781a..75d64514ea0 100644 --- a/src/mesa/drivers/dri/i965/brw_sf_state.c +++ b/src/mesa/drivers/dri/i965/brw_sf_state.c @@ -118,7 +118,6 @@ const struct brw_tracked_state brw_sf_vp = { _NEW_SCISSOR | _NEW_VIEWPORT, .brw = BRW_NEW_BATCH, - .cache = 0 }, .emit = upload_sf_vp }; diff --git a/src/mesa/drivers/dri/i965/brw_state_cache.c b/src/mesa/drivers/dri/i965/brw_state_cache.c index 94086a941b5..3b9d6cc4f98 100644 --- a/src/mesa/drivers/dri/i965/brw_state_cache.c +++ b/src/mesa/drivers/dri/i965/brw_state_cache.c @@ -401,7 +401,6 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) */ brw->state.dirty.mesa |= ~0; brw->state.dirty.brw |= ~0ull; - brw->state.dirty.cache |= ~0; intel_batchbuffer_flush(brw); } diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 875f434c14d..b3f34647772 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -377,9 +377,7 @@ void brw_init_state( struct brw_context *brw ) brw->num_atoms = num_atoms; while (num_atoms--) { - assert((*atoms)->dirty.mesa | - (*atoms)->dirty.brw | - (*atoms)->dirty.cache); + assert((*atoms)->dirty.mesa | (*atoms)->dirty.brw); assert((*atoms)->emit); atoms++; } @@ -419,9 +417,7 @@ void brw_destroy_state( struct brw_context *brw ) static bool check_state(const struct brw_state_flags *a, const struct brw_state_flags *b) { - return ((a->mesa & b->mesa) | - (a->brw & b->brw) | - (a->cache & b->cache)) != 0; + return ((a->mesa & b->mesa) | (a->brw & b->brw)) != 0; } static void accumulate_state( struct brw_state_flags *a, @@ -429,7 +425,6 @@ static void accumulate_state( struct brw_state_flags *a, { a->mesa |= b->mesa; a->brw |= b->brw; - a->cache |= b->cache; } @@ -439,7 +434,6 @@ static void xor_states( struct brw_state_flags *result, { result->mesa = a->mesa ^ b->mesa; result->brw = a->brw ^ b->brw; - result->cache = a->cache ^ b->cache; } struct dirty_bit_map { @@ -534,11 +528,6 @@ static struct dirty_bit_map brw_bits[] = { {0, 0, 0} }; -static struct dirty_bit_map cache_bits[] = { - {0, 0, 0} -}; - - static void brw_update_dirty_count(struct dirty_bit_map *bit_map, uint64_t bits) { @@ -577,7 +566,6 @@ void brw_upload_state(struct brw_context *brw) /* Always re-emit all state. */ state->mesa |= ~0; state->brw |= ~0ull; - state->cache |= ~0; } if (brw->fragment_program != ctx->FragmentProgram._Current) { @@ -605,7 +593,7 @@ void brw_upload_state(struct brw_context *brw) brw->state.dirty.brw |= BRW_NEW_NUM_SAMPLES; } - if ((state->mesa | state->cache | state->brw) == 0) + if ((state->mesa | state->brw) == 0) return; if (unlikely(INTEL_DEBUG)) { @@ -651,11 +639,9 @@ void brw_upload_state(struct brw_context *brw) brw_update_dirty_count(mesa_bits, state->mesa); brw_update_dirty_count(brw_bits, state->brw); - brw_update_dirty_count(cache_bits, state->cache); if (dirty_count++ % 1000 == 0) { brw_print_dirty_count(mesa_bits); brw_print_dirty_count(brw_bits); - brw_print_dirty_count(cache_bits); fprintf(stderr, "\n"); } } diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c index 7a3b4d26384..798d975b1e7 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.c +++ b/src/mesa/drivers/dri/i965/brw_vs.c @@ -520,7 +520,6 @@ const struct brw_tracked_state brw_vs_prog = { _NEW_TRANSFORM, .brw = BRW_NEW_VERTEX_PROGRAM | BRW_NEW_VERTICES, - .cache = 0 }, .emit = brw_upload_vs_prog }; diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 8169ef8ef51..2b2f582eb31 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -738,7 +738,6 @@ const struct brw_tracked_state brw_renderbuffer_surfaces = { .mesa = _NEW_BUFFERS | _NEW_COLOR, .brw = BRW_NEW_BATCH, - .cache = 0 }, .emit = brw_update_renderbuffer_surfaces, }; @@ -747,7 +746,6 @@ const struct brw_tracked_state gen6_renderbuffer_surfaces = { .dirty = { .mesa = _NEW_BUFFERS, .brw = BRW_NEW_BATCH, - .cache = 0 }, .emit = brw_update_renderbuffer_surfaces, }; @@ -829,7 +827,6 @@ const struct brw_tracked_state brw_texture_surfaces = { BRW_NEW_GEOMETRY_PROGRAM | BRW_NEW_TEXTURE_BUFFER | BRW_NEW_VERTEX_PROGRAM, - .cache = 0 }, .emit = brw_update_texture_surfaces, }; diff --git a/src/mesa/drivers/dri/i965/gen6_cc.c b/src/mesa/drivers/dri/i965/gen6_cc.c index 5ab9fa344e3..2bfa271b527 100644 --- a/src/mesa/drivers/dri/i965/gen6_cc.c +++ b/src/mesa/drivers/dri/i965/gen6_cc.c @@ -246,7 +246,6 @@ const struct brw_tracked_state gen6_blend_state = { _NEW_MULTISAMPLE, .brw = BRW_NEW_BATCH | BRW_NEW_STATE_BASE_ADDRESS, - .cache = 0, }, .emit = gen6_upload_blend_state, }; @@ -300,7 +299,6 @@ const struct brw_tracked_state gen6_color_calc_state = { _NEW_STENCIL, .brw = BRW_NEW_BATCH | BRW_NEW_STATE_BASE_ADDRESS, - .cache = 0, }, .emit = gen6_upload_color_calc_state, }; diff --git a/src/mesa/drivers/dri/i965/gen6_depthstencil.c b/src/mesa/drivers/dri/i965/gen6_depthstencil.c index 4535feb65af..2c625c98403 100644 --- a/src/mesa/drivers/dri/i965/gen6_depthstencil.c +++ b/src/mesa/drivers/dri/i965/gen6_depthstencil.c @@ -109,7 +109,6 @@ const struct brw_tracked_state gen6_depth_stencil_state = { _NEW_STENCIL, .brw = BRW_NEW_BATCH | BRW_NEW_STATE_BASE_ADDRESS, - .cache = 0, }, .emit = gen6_upload_depth_stencil_state, }; diff --git a/src/mesa/drivers/dri/i965/gen6_multisample_state.c b/src/mesa/drivers/dri/i965/gen6_multisample_state.c index 912da4d4a7e..7c9cbfaea63 100644 --- a/src/mesa/drivers/dri/i965/gen6_multisample_state.c +++ b/src/mesa/drivers/dri/i965/gen6_multisample_state.c @@ -205,7 +205,6 @@ const struct brw_tracked_state gen6_multisample_state = { .mesa = _NEW_MULTISAMPLE, .brw = BRW_NEW_CONTEXT | BRW_NEW_NUM_SAMPLES, - .cache = 0 }, .emit = upload_multisample_state }; diff --git a/src/mesa/drivers/dri/i965/gen6_sampler_state.c b/src/mesa/drivers/dri/i965/gen6_sampler_state.c index a7402cf64e4..9e7da587696 100644 --- a/src/mesa/drivers/dri/i965/gen6_sampler_state.c +++ b/src/mesa/drivers/dri/i965/gen6_sampler_state.c @@ -51,7 +51,6 @@ const struct brw_tracked_state gen6_sampler_state = { .brw = BRW_NEW_BATCH | BRW_NEW_SAMPLER_STATE_TABLE | BRW_NEW_STATE_BASE_ADDRESS, - .cache = 0, }, .emit = upload_sampler_state_pointers, }; diff --git a/src/mesa/drivers/dri/i965/gen6_scissor_state.c b/src/mesa/drivers/dri/i965/gen6_scissor_state.c index 02244b374c0..0111f152ef6 100644 --- a/src/mesa/drivers/dri/i965/gen6_scissor_state.c +++ b/src/mesa/drivers/dri/i965/gen6_scissor_state.c @@ -96,7 +96,6 @@ const struct brw_tracked_state gen6_scissor_state = { _NEW_SCISSOR | _NEW_VIEWPORT, .brw = BRW_NEW_BATCH, - .cache = 0, }, .emit = gen6_upload_scissor_state, }; diff --git a/src/mesa/drivers/dri/i965/gen6_sol.c b/src/mesa/drivers/dri/i965/gen6_sol.c index 3866a81f218..0dafd0ff1b9 100644 --- a/src/mesa/drivers/dri/i965/gen6_sol.c +++ b/src/mesa/drivers/dri/i965/gen6_sol.c @@ -95,7 +95,6 @@ const struct brw_tracked_state gen6_sol_surface = { BRW_NEW_GEOMETRY_PROGRAM | BRW_NEW_VERTEX_PROGRAM | BRW_NEW_TRANSFORM_FEEDBACK, - .cache = 0 }, .emit = gen6_update_sol_surfaces, }; @@ -190,7 +189,6 @@ const struct brw_tracked_state gen6_gs_binding_table = { BRW_NEW_GEOMETRY_PROGRAM | BRW_NEW_VERTEX_PROGRAM | BRW_NEW_SURFACES, - .cache = 0 }, .emit = brw_gs_upload_binding_table, }; diff --git a/src/mesa/drivers/dri/i965/gen6_viewport_state.c b/src/mesa/drivers/dri/i965/gen6_viewport_state.c index 4c8fe4c322f..81546e49632 100644 --- a/src/mesa/drivers/dri/i965/gen6_viewport_state.c +++ b/src/mesa/drivers/dri/i965/gen6_viewport_state.c @@ -70,7 +70,6 @@ const struct brw_tracked_state gen6_clip_vp = { .dirty = { .mesa = _NEW_VIEWPORT, .brw = BRW_NEW_BATCH, - .cache = 0, }, .emit = gen6_upload_clip_vp, }; @@ -114,7 +113,6 @@ const struct brw_tracked_state gen6_sf_vp = { .mesa = _NEW_BUFFERS | _NEW_VIEWPORT, .brw = BRW_NEW_BATCH, - .cache = 0, }, .emit = gen6_upload_sf_vp, }; @@ -140,7 +138,6 @@ const struct brw_tracked_state gen6_viewport_state = { BRW_NEW_CLIP_VP | BRW_NEW_SF_VP | BRW_NEW_STATE_BASE_ADDRESS, - .cache = 0, }, .emit = upload_viewport_state_pointers, }; diff --git a/src/mesa/drivers/dri/i965/gen7_disable.c b/src/mesa/drivers/dri/i965/gen7_disable.c index 98d115b9e22..2c43cd77f07 100644 --- a/src/mesa/drivers/dri/i965/gen7_disable.c +++ b/src/mesa/drivers/dri/i965/gen7_disable.c @@ -93,7 +93,6 @@ const struct brw_tracked_state gen7_disable_stages = { .dirty = { .mesa = 0, .brw = BRW_NEW_CONTEXT, - .cache = 0, }, .emit = disable_stages, }; diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c index be5abf2aabb..33d4ade4fe5 100644 --- a/src/mesa/drivers/dri/i965/gen7_misc_state.c +++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c @@ -205,7 +205,6 @@ const struct brw_tracked_state gen7_depthbuffer = { _NEW_DEPTH | _NEW_STENCIL, .brw = BRW_NEW_BATCH, - .cache = 0, }, .emit = brw_emit_depthbuffer, }; diff --git a/src/mesa/drivers/dri/i965/gen7_sf_state.c b/src/mesa/drivers/dri/i965/gen7_sf_state.c index c260bbab6b3..b9838470c64 100644 --- a/src/mesa/drivers/dri/i965/gen7_sf_state.c +++ b/src/mesa/drivers/dri/i965/gen7_sf_state.c @@ -257,7 +257,6 @@ const struct brw_tracked_state gen7_sf_state = { _NEW_PROGRAM | _NEW_SCISSOR, .brw = BRW_NEW_CONTEXT, - .cache = 0, }, .emit = upload_sf_state, }; diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c b/src/mesa/drivers/dri/i965/gen7_urb.c index d90e48c802e..201f42e7ad5 100644 --- a/src/mesa/drivers/dri/i965/gen7_urb.c +++ b/src/mesa/drivers/dri/i965/gen7_urb.c @@ -131,7 +131,6 @@ const struct brw_tracked_state gen7_push_constant_space = { .dirty = { .mesa = 0, .brw = BRW_NEW_CONTEXT | BRW_NEW_GEOMETRY_PROGRAM, - .cache = 0, }, .emit = gen7_allocate_push_constants, }; diff --git a/src/mesa/drivers/dri/i965/gen7_viewport_state.c b/src/mesa/drivers/dri/i965/gen7_viewport_state.c index 01af0440098..bd11c3aa36c 100644 --- a/src/mesa/drivers/dri/i965/gen7_viewport_state.c +++ b/src/mesa/drivers/dri/i965/gen7_viewport_state.c @@ -95,7 +95,6 @@ const struct brw_tracked_state gen7_sf_clip_viewport = { .mesa = _NEW_BUFFERS | _NEW_VIEWPORT, .brw = BRW_NEW_BATCH, - .cache = 0, }, .emit = gen7_upload_sf_clip_viewport, }; diff --git a/src/mesa/drivers/dri/i965/gen8_blend_state.c b/src/mesa/drivers/dri/i965/gen8_blend_state.c index 2e3a33a67c2..786c79ad44d 100644 --- a/src/mesa/drivers/dri/i965/gen8_blend_state.c +++ b/src/mesa/drivers/dri/i965/gen8_blend_state.c @@ -204,7 +204,6 @@ const struct brw_tracked_state gen8_blend_state = { _NEW_MULTISAMPLE, .brw = BRW_NEW_BATCH | BRW_NEW_STATE_BASE_ADDRESS, - .cache = 0, }, .emit = gen8_upload_blend_state, }; @@ -297,7 +296,6 @@ const struct brw_tracked_state gen8_ps_blend = { _NEW_MULTISAMPLE, .brw = BRW_NEW_CONTEXT | BRW_NEW_FRAGMENT_PROGRAM, - .cache = 0, }, .emit = gen8_upload_ps_blend }; diff --git a/src/mesa/drivers/dri/i965/gen8_disable.c b/src/mesa/drivers/dri/i965/gen8_disable.c index 0839a4999a2..da0d4a5fe7a 100644 --- a/src/mesa/drivers/dri/i965/gen8_disable.c +++ b/src/mesa/drivers/dri/i965/gen8_disable.c @@ -114,7 +114,6 @@ const struct brw_tracked_state gen8_disable_stages = { .dirty = { .mesa = 0, .brw = BRW_NEW_CONTEXT, - .cache = 0, }, .emit = disable_stages, }; diff --git a/src/mesa/drivers/dri/i965/gen8_draw_upload.c b/src/mesa/drivers/dri/i965/gen8_draw_upload.c index 9e8e24b4630..0d6feec8ab0 100644 --- a/src/mesa/drivers/dri/i965/gen8_draw_upload.c +++ b/src/mesa/drivers/dri/i965/gen8_draw_upload.c @@ -262,7 +262,6 @@ const struct brw_tracked_state gen8_index_buffer = { .mesa = 0, .brw = BRW_NEW_BATCH | BRW_NEW_INDEX_BUFFER, - .cache = 0, }, .emit = gen8_emit_index_buffer, }; @@ -280,7 +279,6 @@ const struct brw_tracked_state gen8_vf_topology = { .dirty = { .mesa = 0, .brw = BRW_NEW_PRIMITIVE, - .cache = 0, }, .emit = gen8_emit_vf_topology, }; diff --git a/src/mesa/drivers/dri/i965/gen8_misc_state.c b/src/mesa/drivers/dri/i965/gen8_misc_state.c index 5c54127c20d..f993650aeb9 100644 --- a/src/mesa/drivers/dri/i965/gen8_misc_state.c +++ b/src/mesa/drivers/dri/i965/gen8_misc_state.c @@ -80,7 +80,6 @@ const struct brw_tracked_state gen8_state_base_address = { .mesa = 0, .brw = BRW_NEW_BATCH | BRW_NEW_PROGRAM_CACHE, - .cache = 0, }, .emit = upload_state_base_address }; diff --git a/src/mesa/drivers/dri/i965/gen8_multisample_state.c b/src/mesa/drivers/dri/i965/gen8_multisample_state.c index ff75df6e6ed..75cbe06c522 100644 --- a/src/mesa/drivers/dri/i965/gen8_multisample_state.c +++ b/src/mesa/drivers/dri/i965/gen8_multisample_state.c @@ -85,7 +85,6 @@ const struct brw_tracked_state gen8_multisample_state = { .mesa = _NEW_MULTISAMPLE, .brw = BRW_NEW_CONTEXT | BRW_NEW_NUM_SAMPLES, - .cache = 0 }, .emit = upload_multisample_state }; diff --git a/src/mesa/drivers/dri/i965/gen8_sf_state.c b/src/mesa/drivers/dri/i965/gen8_sf_state.c index 91d58011599..f6cb3ddef27 100644 --- a/src/mesa/drivers/dri/i965/gen8_sf_state.c +++ b/src/mesa/drivers/dri/i965/gen8_sf_state.c @@ -209,7 +209,6 @@ const struct brw_tracked_state gen8_sf_state = { _NEW_MULTISAMPLE | _NEW_POINT, .brw = BRW_NEW_CONTEXT, - .cache = 0, }, .emit = upload_sf, }; @@ -327,7 +326,6 @@ const struct brw_tracked_state gen8_raster_state = { _NEW_SCISSOR | _NEW_TRANSFORM, .brw = BRW_NEW_CONTEXT, - .cache = 0, }, .emit = upload_raster, }; diff --git a/src/mesa/drivers/dri/i965/gen8_sol_state.c b/src/mesa/drivers/dri/i965/gen8_sol_state.c index 555adcbb257..1f122ec6996 100644 --- a/src/mesa/drivers/dri/i965/gen8_sol_state.c +++ b/src/mesa/drivers/dri/i965/gen8_sol_state.c @@ -170,7 +170,6 @@ const struct brw_tracked_state gen8_sol_state = { .brw = BRW_NEW_BATCH | BRW_NEW_TRANSFORM_FEEDBACK | BRW_NEW_VUE_MAP_GEOM_OUT, - .cache = 0, }, .emit = upload_sol_state, }; diff --git a/src/mesa/drivers/dri/i965/gen8_viewport_state.c b/src/mesa/drivers/dri/i965/gen8_viewport_state.c index 56042d1eaf9..93198c48672 100644 --- a/src/mesa/drivers/dri/i965/gen8_viewport_state.c +++ b/src/mesa/drivers/dri/i965/gen8_viewport_state.c @@ -133,7 +133,6 @@ const struct brw_tracked_state gen8_sf_clip_viewport = { .mesa = _NEW_BUFFERS | _NEW_VIEWPORT, .brw = BRW_NEW_BATCH, - .cache = 0, }, .emit = gen8_upload_sf_clip_viewport, }; diff --git a/src/mesa/drivers/dri/i965/gen8_wm_depth_stencil.c b/src/mesa/drivers/dri/i965/gen8_wm_depth_stencil.c index 83a08c5ebb8..2c843b202ea 100644 --- a/src/mesa/drivers/dri/i965/gen8_wm_depth_stencil.c +++ b/src/mesa/drivers/dri/i965/gen8_wm_depth_stencil.c @@ -112,7 +112,6 @@ const struct brw_tracked_state gen8_wm_depth_stencil = { _NEW_DEPTH | _NEW_STENCIL, .brw = BRW_NEW_CONTEXT, - .cache = 0, }, .emit = gen8_upload_wm_depth_stencil, };