From: Eddie Hung <eddie@fpgeh.com>
Date: Tue, 28 May 2019 16:38:58 +0000 (-0700)
Subject: From master
X-Git-Tag: working-ls180~1208^2~250
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=5f39c262c278f90f6bbb55d5969b970230876ef5;p=yosys.git

From master
---

diff --git a/tests/tools/autotest.sh b/tests/tools/autotest.sh
index 1825990a9..920474a84 100755
--- a/tests/tools/autotest.sh
+++ b/tests/tools/autotest.sh
@@ -132,13 +132,13 @@ do
 		fn=$(basename $fn)
 		bn=$(basename $bn)
 
+		rm -f ${bn}_ref.fir
 		if [[ "$ext" == "v" ]]; then
 			egrep -v '^\s*`timescale' ../$fn > ${bn}_ref.${ext}
 		else
 			"$toolsdir"/../../yosys -f "$frontend $include_opts" -b "verilog" -o ${bn}_ref.v ../${fn}
 			frontend="verilog -noblackbox"
 		fi
-		rm -f ${bn}_ref.fir
 
 		if [ ! -f ../${bn}_tb.v ]; then
 			"$toolsdir"/../../yosys -f "$frontend $include_opts" -b "test_autotb $autotb_opts" -o ${bn}_tb.v ${bn}_ref.v