From: Jacob Lifshay Date: Mon, 7 Aug 2023 23:04:00 +0000 (-0700) Subject: split out instructions from openpower/isa/fpload.mdwn X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=607c269655b7625f99e8b32b56c3ea5dd9742d9f;p=openpower-isa.git split out instructions from openpower/isa/fpload.mdwn --- diff --git a/openpower/isa/fpload.mdwn b/openpower/isa/fpload.mdwn index 05cbfcdd..f02ec6a3 100644 --- a/openpower/isa/fpload.mdwn +++ b/openpower/isa/fpload.mdwn @@ -2,156 +2,22 @@ -# Load Floating-Point Single +[[!inline pagenames="openpower/isa/fpload/lfs" raw="yes"]] -D-Form +[[!inline pagenames="openpower/isa/fpload/lfsx" raw="yes"]] -* lfs FRT,D(RA) +[[!inline pagenames="openpower/isa/fpload/lfsu" raw="yes"]] -Pseudo-code: +[[!inline pagenames="openpower/isa/fpload/lfsux" raw="yes"]] - EA <- (RA|0) + EXTS(D) - FRT <- DOUBLE(MEM(EA, 4)) +[[!inline pagenames="openpower/isa/fpload/lfd" raw="yes"]] -Special Registers Altered: +[[!inline pagenames="openpower/isa/fpload/lfdx" raw="yes"]] - None +[[!inline pagenames="openpower/isa/fpload/lfdu" raw="yes"]] -# Load Floating-Point Single Indexed +[[!inline pagenames="openpower/isa/fpload/lfdux" raw="yes"]] -X-Form +[[!inline pagenames="openpower/isa/fpload/lfiwax" raw="yes"]] -* lfsx FRT,RA,RB - -Pseudo-code: - - EA <- (RA|0) + (RB) - FRT <- DOUBLE(MEM(EA, 4)) - -Special Registers Altered: - - None - -# Load Floating-Point Single with Update - -D-Form - -* lfsu FRT,D(RA) - -Pseudo-code: - - EA <- (RA) + EXTS(D) - FRT <- DOUBLE(MEM(EA, 4)) - RA <- EA - -Special Registers Altered: - - None - -# Load Floating-Point Single with Update Indexed - -X-Form - -* lfsux FRT,RA,RB - -Pseudo-code: - - EA <- (RA) + (RB) - FRT <- DOUBLE(MEM(EA, 4)) - RA <- EA - -Special Registers Altered: - - None - -# Load Floating-Point Double - -D-Form - -* lfd FRT,D(RA) - -Pseudo-code: - - EA <- (RA|0) + EXTS(D) - FRT <- MEM(EA, 8) - -Special Registers Altered: - - None - -# Load Floating-Point Double Indexed - -X-Form - -* lfdx FRT,RA,RB - -Pseudo-code: - - EA <- (RA|0) + (RB) - FRT <- MEM(EA, 8) - -Special Registers Altered: - - None - -# Load Floating-Point Double with Update - -D-Form - -* lfdu FRT,D(RA) - -Pseudo-code: - - EA <- (RA) + EXTS(D) - FRT <- MEM(EA, 8) - RA <- EA - -Special Registers Altered: - - None - -# Load Floating-Point Double with Update Indexed - -X-Form - -* lfdux FRT,RA,RB - -Pseudo-code: - - EA <- (RA) + (RB) - FRT <- MEM(EA, 8) - RA <- EA - -Special Registers Altered: - - None - -# Load Floating-Point as Integer Word Algebraic Indexed - -X-Form - -* lfiwax FRT,RA,RB - -Pseudo-code: - - EA <- (RA|0) + (RB) - FRT <- EXTS(MEM(EA, 4)) - -Special Registers Altered: - - None - -# Load Floating-Point as Integer Word Zero Indexed - -X-Form - -* lfiwzx FRT,RA,RB - -Pseudo-code: - - EA <- (RA|0) + (RB) - FRT <- [0]*32 || MEM(EA, 4) - -Special Registers Altered: - - None +[[!inline pagenames="openpower/isa/fpload/lfiwzx" raw="yes"]] diff --git a/openpower/isa/fpload/lfd.mdwn b/openpower/isa/fpload/lfd.mdwn new file mode 100644 index 00000000..eb7cce11 --- /dev/null +++ b/openpower/isa/fpload/lfd.mdwn @@ -0,0 +1,13 @@ +# Load Floating-Point Double + +D-Form + +* lfd FRT,D(RA) + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpload/lfd_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpload/lfd_code.mdwn b/openpower/isa/fpload/lfd_code.mdwn new file mode 100644 index 00000000..a1dcf6bb --- /dev/null +++ b/openpower/isa/fpload/lfd_code.mdwn @@ -0,0 +1,2 @@ + EA <- (RA|0) + EXTS(D) + FRT <- MEM(EA, 8) diff --git a/openpower/isa/fpload/lfdu.mdwn b/openpower/isa/fpload/lfdu.mdwn new file mode 100644 index 00000000..850108cf --- /dev/null +++ b/openpower/isa/fpload/lfdu.mdwn @@ -0,0 +1,13 @@ +# Load Floating-Point Double with Update + +D-Form + +* lfdu FRT,D(RA) + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpload/lfdu_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpload/lfdu_code.mdwn b/openpower/isa/fpload/lfdu_code.mdwn new file mode 100644 index 00000000..328e68f2 --- /dev/null +++ b/openpower/isa/fpload/lfdu_code.mdwn @@ -0,0 +1,3 @@ + EA <- (RA) + EXTS(D) + FRT <- MEM(EA, 8) + RA <- EA diff --git a/openpower/isa/fpload/lfdux.mdwn b/openpower/isa/fpload/lfdux.mdwn new file mode 100644 index 00000000..bf81b9f2 --- /dev/null +++ b/openpower/isa/fpload/lfdux.mdwn @@ -0,0 +1,13 @@ +# Load Floating-Point Double with Update Indexed + +X-Form + +* lfdux FRT,RA,RB + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpload/lfdux_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpload/lfdux_code.mdwn b/openpower/isa/fpload/lfdux_code.mdwn new file mode 100644 index 00000000..b12c074c --- /dev/null +++ b/openpower/isa/fpload/lfdux_code.mdwn @@ -0,0 +1,3 @@ + EA <- (RA) + (RB) + FRT <- MEM(EA, 8) + RA <- EA diff --git a/openpower/isa/fpload/lfdx.mdwn b/openpower/isa/fpload/lfdx.mdwn new file mode 100644 index 00000000..a24f517f --- /dev/null +++ b/openpower/isa/fpload/lfdx.mdwn @@ -0,0 +1,13 @@ +# Load Floating-Point Double Indexed + +X-Form + +* lfdx FRT,RA,RB + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpload/lfdx_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpload/lfdx_code.mdwn b/openpower/isa/fpload/lfdx_code.mdwn new file mode 100644 index 00000000..86eee620 --- /dev/null +++ b/openpower/isa/fpload/lfdx_code.mdwn @@ -0,0 +1,2 @@ + EA <- (RA|0) + (RB) + FRT <- MEM(EA, 8) diff --git a/openpower/isa/fpload/lfiwax.mdwn b/openpower/isa/fpload/lfiwax.mdwn new file mode 100644 index 00000000..93367780 --- /dev/null +++ b/openpower/isa/fpload/lfiwax.mdwn @@ -0,0 +1,13 @@ +# Load Floating-Point as Integer Word Algebraic Indexed + +X-Form + +* lfiwax FRT,RA,RB + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpload/lfiwax_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpload/lfiwax_code.mdwn b/openpower/isa/fpload/lfiwax_code.mdwn new file mode 100644 index 00000000..1d0a6600 --- /dev/null +++ b/openpower/isa/fpload/lfiwax_code.mdwn @@ -0,0 +1,2 @@ + EA <- (RA|0) + (RB) + FRT <- EXTS(MEM(EA, 4)) diff --git a/openpower/isa/fpload/lfiwzx.mdwn b/openpower/isa/fpload/lfiwzx.mdwn new file mode 100644 index 00000000..56bdc25f --- /dev/null +++ b/openpower/isa/fpload/lfiwzx.mdwn @@ -0,0 +1,13 @@ +# Load Floating-Point as Integer Word Zero Indexed + +X-Form + +* lfiwzx FRT,RA,RB + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpload/lfiwzx_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpload/lfiwzx_code.mdwn b/openpower/isa/fpload/lfiwzx_code.mdwn new file mode 100644 index 00000000..768d5c32 --- /dev/null +++ b/openpower/isa/fpload/lfiwzx_code.mdwn @@ -0,0 +1,2 @@ + EA <- (RA|0) + (RB) + FRT <- [0]*32 || MEM(EA, 4) diff --git a/openpower/isa/fpload/lfs.mdwn b/openpower/isa/fpload/lfs.mdwn new file mode 100644 index 00000000..eea38831 --- /dev/null +++ b/openpower/isa/fpload/lfs.mdwn @@ -0,0 +1,13 @@ +# Load Floating-Point Single + +D-Form + +* lfs FRT,D(RA) + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpload/lfs_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpload/lfs_code.mdwn b/openpower/isa/fpload/lfs_code.mdwn new file mode 100644 index 00000000..7e651a15 --- /dev/null +++ b/openpower/isa/fpload/lfs_code.mdwn @@ -0,0 +1,2 @@ + EA <- (RA|0) + EXTS(D) + FRT <- DOUBLE(MEM(EA, 4)) diff --git a/openpower/isa/fpload/lfsu.mdwn b/openpower/isa/fpload/lfsu.mdwn new file mode 100644 index 00000000..06b5a080 --- /dev/null +++ b/openpower/isa/fpload/lfsu.mdwn @@ -0,0 +1,13 @@ +# Load Floating-Point Single with Update + +D-Form + +* lfsu FRT,D(RA) + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpload/lfsu_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpload/lfsu_code.mdwn b/openpower/isa/fpload/lfsu_code.mdwn new file mode 100644 index 00000000..6bb74296 --- /dev/null +++ b/openpower/isa/fpload/lfsu_code.mdwn @@ -0,0 +1,3 @@ + EA <- (RA) + EXTS(D) + FRT <- DOUBLE(MEM(EA, 4)) + RA <- EA diff --git a/openpower/isa/fpload/lfsux.mdwn b/openpower/isa/fpload/lfsux.mdwn new file mode 100644 index 00000000..95fa420a --- /dev/null +++ b/openpower/isa/fpload/lfsux.mdwn @@ -0,0 +1,13 @@ +# Load Floating-Point Single with Update Indexed + +X-Form + +* lfsux FRT,RA,RB + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpload/lfsux_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpload/lfsux_code.mdwn b/openpower/isa/fpload/lfsux_code.mdwn new file mode 100644 index 00000000..5663f79b --- /dev/null +++ b/openpower/isa/fpload/lfsux_code.mdwn @@ -0,0 +1,3 @@ + EA <- (RA) + (RB) + FRT <- DOUBLE(MEM(EA, 4)) + RA <- EA diff --git a/openpower/isa/fpload/lfsx.mdwn b/openpower/isa/fpload/lfsx.mdwn new file mode 100644 index 00000000..c3ee3a2c --- /dev/null +++ b/openpower/isa/fpload/lfsx.mdwn @@ -0,0 +1,13 @@ +# Load Floating-Point Single Indexed + +X-Form + +* lfsx FRT,RA,RB + +Pseudo-code: + +[[!inline pagenames="openpower/isa/fpload/lfsx_code" raw="yes"]] + +Special Registers Altered: + + None diff --git a/openpower/isa/fpload/lfsx_code.mdwn b/openpower/isa/fpload/lfsx_code.mdwn new file mode 100644 index 00000000..60e8d29c --- /dev/null +++ b/openpower/isa/fpload/lfsx_code.mdwn @@ -0,0 +1,2 @@ + EA <- (RA|0) + (RB) + FRT <- DOUBLE(MEM(EA, 4))