From: Luke Kenneth Casson Leighton Date: Mon, 28 Dec 2020 13:41:46 +0000 (+0000) Subject: update business plan X-Git-Tag: convert-csv-opcode-to-binary~765 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=607c88541565c7f20ef591df05e2b342ea6010a4;p=libreriscv.git update business plan --- diff --git a/business_plan.mdwn b/business_plan.mdwn index 7beb194cc..8511f4f7f 100644 --- a/business_plan.mdwn +++ b/business_plan.mdwn @@ -14,10 +14,10 @@ tablets, Industrial IoT, routers, IPTV and many more. We accomplish this at the hardware level by extending the OpenPOWER Instruction Set Architecture (ISA) with an innovative Vector ISA that merges 3D, Video and CPU into one single hybrid processor, where normal -systems would have two or three separate processors. At the software -level we engage closely with community resources and partners to ensure -upstream collaboration. Complexity is reduced, time to market is reduced, -power consumption is reduced. +systems would have two or three separate processors (and complex firmware +arrangements). At the software level we engage closely with community +resources and partners to ensure upstream collaboration. Complexity is +reduced, time to market is reduced, power consumption is reduced. A typical SoC licenses separate closed-source CPU and closed-source GPU, introducing huge complexity in the drivers, making the ODM critically