From: Eric Anholt <eric@anholt.net>
Date: Mon, 19 Dec 2011 18:52:31 +0000 (-0800)
Subject: i965: Add sensible disasm for the JMPI instruction.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=60982976ee14c271353b9545ca5ac085b97ab9b0;p=mesa.git

i965: Add sensible disasm for the JMPI instruction.

We care about the jump distance, not that the first src is always the
ip register.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
---

diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c
index 23ad3de71df..cfea1a30ecc 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -74,7 +74,7 @@ struct {
     [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
     [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },
     [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 },
-    [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 1, .ndst = 0 },
+    [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 0, .ndst = 0 },
     [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 },
     [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 },
     [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 },
@@ -932,6 +932,8 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
 			    inst->header.opcode == BRW_OPCODE_ENDIF ||
 			    inst->header.opcode == BRW_OPCODE_WHILE)) {
        format (file, " %d", inst->bits1.branch_gen6.jump_count);
+    } else if (inst->header.opcode == BRW_OPCODE_JMPI) {
+       format (file, " %d", inst->bits3.d);
     }
 
     if (opcode[inst->header.opcode].nsrc > 0) {