From: Tobias Platen <tplaten@posteo.de>
Date: Tue, 1 Feb 2022 18:13:33 +0000 (+0000)
Subject: correct path for make target microwatt_external_core
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6148dd16affa4cb00c94b019c556084d2ce11f72;p=soc.git

correct path for make target microwatt_external_core
---

diff --git a/Makefile b/Makefile
index 20bce282..bdfa1f82 100644
--- a/Makefile
+++ b/Makefile
@@ -58,7 +58,7 @@ ls180_4k_verilog:
 
 # build microwatt "external core"
 microwatt_external_core:
-	python3 simple/issuer_verilog.py --microwatt-compat --enable-mmu \
+	python3 src/soc/simple/issuer_verilog.py --microwatt-compat --enable-mmu \
             external_core_top.v
 
 # build the litex libresoc SoC without 4k SRAMs