From: Clifford Wolf <clifford@clifford.at>
Date: Sun, 17 May 2015 06:19:52 +0000 (+0200)
Subject: Verific build fixes
X-Git-Tag: yosys-0.6~292
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=61512b6f4115fce5326b78914b675be278c6845f;p=yosys.git

Verific build fixes
---

diff --git a/frontends/verific/build_amd64.txt b/frontends/verific/build_amd64.txt
index 9bb6e3203..0a2204753 100644
--- a/frontends/verific/build_amd64.txt
+++ b/frontends/verific/build_amd64.txt
@@ -21,7 +21,7 @@ VERIFIC_DIR = /usr/local/src/verific_lib_eval
 2.) Install the necessary multilib packages
 
 Hint: On debian/ubuntu the multilib packages have names such as
-libreadline-dev:amd64 or lib32readline6-dev, depending on the
+libreadline-dev:i386 or lib32readline6-dev, depending on the
 exact version of debian/ubuntu you are working with.
 
 
diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc
index 79abcf245..5f362a0c3 100644
--- a/frontends/verific/verific.cc
+++ b/frontends/verific/verific.cc
@@ -65,7 +65,7 @@ static void msg_func(msg_type_t msg_type, const char *message_id, linefile_type
 	log("\n");
 }
 
-static void import_attributes(std::map<RTLIL::IdString, RTLIL::Const> &attributes, DesignObj *obj)
+static void import_attributes(dict<RTLIL::IdString, RTLIL::Const> &attributes, DesignObj *obj)
 {
 	MapIter mi;
 	Att *attr;
diff --git a/kernel/log.cc b/kernel/log.cc
index bf92daced..29644a067 100644
--- a/kernel/log.cc
+++ b/kernel/log.cc
@@ -264,7 +264,7 @@ void log_pop()
 	log_flush();
 }
 
-#ifdef __linux__
+#if defined(__linux__) && defined(YOSYS_ENABLE_PLUGINS)
 void log_backtrace(const char *prefix, int levels)
 {
 	if (levels <= 0) return;
diff --git a/techlibs/ice40/Makefile.inc b/techlibs/ice40/Makefile.inc
index 6900f74ab..a9d2f2369 100644
--- a/techlibs/ice40/Makefile.inc
+++ b/techlibs/ice40/Makefile.inc
@@ -11,8 +11,8 @@ EXTRA_OBJS += techlibs/ice40/brams_init.mk
 .SECONDARY: techlibs/ice40/brams_init.mk
 
 techlibs/ice40/brams_init.mk: techlibs/ice40/brams_init.py
-	cd techlibs/ice40 && python brams_init.py
-	touch techlibs/ice40/brams_init.mk
+	$(P) cd techlibs/ice40 && python brams_init.py
+	$(Q) touch techlibs/ice40/brams_init.mk
 
 techlibs/ice40/brams_init1.vh: techlibs/ice40/brams_init.mk
 techlibs/ice40/brams_init2.vh: techlibs/ice40/brams_init.mk
diff --git a/techlibs/xilinx/Makefile.inc b/techlibs/xilinx/Makefile.inc
index 76a0cd742..a8f5416e3 100644
--- a/techlibs/xilinx/Makefile.inc
+++ b/techlibs/xilinx/Makefile.inc
@@ -10,8 +10,8 @@ EXTRA_OBJS += techlibs/xilinx/brams_init.mk
 .SECONDARY: techlibs/xilinx/brams_init.mk
 
 techlibs/xilinx/brams_init.mk: techlibs/xilinx/brams_init.py
-	cd techlibs/xilinx && python brams_init.py
-	touch techlibs/xilinx/brams_init.mk
+	$(P) cd techlibs/xilinx && python brams_init.py
+	$(Q) touch techlibs/xilinx/brams_init.mk
 
 techlibs/xilinx/brams_init_36.vh: techlibs/xilinx/brams_init.mk
 techlibs/xilinx/brams_init_32.vh: techlibs/xilinx/brams_init.mk