From: Jim Wilson Date: Tue, 5 Feb 2019 01:31:10 +0000 (-0800) Subject: RISC-V: Add FP register core file support. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=617126bc8ae3c83b565aef1a454742c8a7237c14;p=binutils-gdb.git RISC-V: Add FP register core file support. This adds fp reg support similar to the existing general reg support. This fixes one gdb testsuite failure FAIL: gdb.base/gcore.exp: corefile restored system registers which fails without the patch because fcsr was missing. Otherwise, no regressions with riscv64-linux native testsuite run. gdb/ * riscv-linux-tdep.c (riscv_linux_fregmap): New. (riscv_linux_fregset): New. (riscv_linux_iterate_over_regset_sections): Call cb for .reg2 section. --- diff --git a/gdb/ChangeLog b/gdb/ChangeLog index a714d50f50a..de727739f2a 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,9 @@ +2019-02-08 Jim Wilson + + * riscv-linux-tdep.c (riscv_linux_fregmap): New. + (riscv_linux_fregset): New. + (riscv_linux_iterate_over_regset_sections): Call cb for .reg2 section. + 2019-02-07 Tom Tromey * thread.c (thread_cancel_execution_command): Update. diff --git a/gdb/riscv-linux-tdep.c b/gdb/riscv-linux-tdep.c index e1f8e76567e..91061c5b3e9 100644 --- a/gdb/riscv-linux-tdep.c +++ b/gdb/riscv-linux-tdep.c @@ -37,6 +37,16 @@ static const struct regcache_map_entry riscv_linux_gregmap[] = { 0 } }; +/* Define the FP register mapping. The kernel puts the 32 FP regs first, and + then FCSR. */ + +static const struct regcache_map_entry riscv_linux_fregmap[] = +{ + { 32, RISCV_FIRST_FP_REGNUM, 0 }, + { 1, RISCV_CSR_FCSR_REGNUM, 0 }, + { 0 } +}; + /* Define the general register regset. */ static const struct regset riscv_linux_gregset = @@ -44,6 +54,13 @@ static const struct regset riscv_linux_gregset = riscv_linux_gregmap, regcache_supply_regset, regcache_collect_regset }; +/* Define the FP register regset. */ + +static const struct regset riscv_linux_fregset = +{ + riscv_linux_fregmap, regcache_supply_regset, regcache_collect_regset +}; + /* Define hook for core file support. */ static void @@ -54,8 +71,10 @@ riscv_linux_iterate_over_regset_sections (struct gdbarch *gdbarch, { cb (".reg", (32 * riscv_isa_xlen (gdbarch)), (32 * riscv_isa_xlen (gdbarch)), &riscv_linux_gregset, NULL, cb_data); - - /* TODO: Add FP register support. */ + /* The kernel is adding 8 bytes for FCSR. */ + cb (".reg2", (32 * riscv_isa_flen (gdbarch)) + 8, + (32 * riscv_isa_flen (gdbarch)) + 8, + &riscv_linux_fregset, NULL, cb_data); } /* Signal trampoline support. */