From: Nikos Nikoleris <nikos.nikoleris@arm.com>
Date: Mon, 5 Dec 2016 21:48:20 +0000 (-0500)
Subject: cpu: Change traffic generators to use different values for writes
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=61860f24193d43e137095cb505abd3413bdf708a;p=gem5.git

cpu: Change traffic generators to use different values for writes

Previously all traffic generators would use the same value for write
requests. With this change traffic generators use their master id as
the payload of write requests making them more useful for the
memchecker.

Change-Id: Id1a6b8f02853789b108ef6003f4c32ab929bb123
Reviewed-by: Andreas Hansson <andreas.hansson@arm.com>
Reviewed-by: Stephan Diestelhorst <stephan.diestelhorst@arm.com>
---

diff --git a/src/cpu/testers/traffic_gen/generators.cc b/src/cpu/testers/traffic_gen/generators.cc
index 75de2f957..190d0daa5 100644
--- a/src/cpu/testers/traffic_gen/generators.cc
+++ b/src/cpu/testers/traffic_gen/generators.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012-2013 ARM Limited
+ * Copyright (c) 2012-2013, 2016 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -40,6 +40,8 @@
  *          Neha Agarwal
  */
 
+#include <algorithm>
+
 #include "base/random.hh"
 #include "base/trace.hh"
 #include "cpu/testers/traffic_gen/generators.hh"
@@ -68,7 +70,7 @@ BaseGen::getPacket(Addr addr, unsigned size, const MemCmd& cmd,
     pkt->dataDynamic(pkt_data);
 
     if (cmd.isWrite()) {
-        memset(pkt_data, 0xA, req->getSize());
+        std::fill_n(pkt_data, req->getSize(), (uint8_t)masterID);
     }
 
     return pkt;