From: Carl Love <cel@us.ibm.com>
Date: Wed, 7 Jun 2017 21:59:06 +0000 (+0000)
Subject: altivec.md: Fix argument swizzle in vec_doublel support...
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=618f988cb292988a4380280bcc01cb4cbffe88d7;p=gcc.git

altivec.md: Fix argument swizzle in vec_doublel support...

gcc/ChangeLog:

2017-06-07  Carl Love  <cel@us.ibm.com>

	* config/rs6000/altivec.md: Fix argument swizzle in vec_doublel
	support, Generate	doublehv for signed int/float for BE case only.

From-SVN: r248996
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index efe7d11a5e5..ffa013214dc 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2017-06-07  Carl Love  <cel@us.ibm.com>
+
+	* config/rs6000/altivec.md: Fix argument swizzle in vec_doublel
+	support, Generate	doublehv for signed int/float for BE case only.
+
 2017-06-07  Alexander Monakov  <amonakov@ispras.ru>
 
 	* doc/invoke.texi (mcx16): Rewrite.
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 404cc4eb8ac..9e592bce393 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -3003,8 +3003,8 @@
 					 operands[1], rtx_val));
 
       rtx_val = GEN_INT (8);
-      emit_insn (gen_vsx_xxsldwi_<mode> (rtx_tmp, operands[1],
-					 rtx_tmp, rtx_val));
+      emit_insn (gen_vsx_xxsldwi_<mode> (rtx_tmp, rtx_tmp,
+					 operands[1],rtx_val));
       emit_insn (gen_vsx_xvcv<VS_sxwsp>dp (operands[0], rtx_tmp));
     }
   else