From: Georg-Johann Lay Date: Wed, 1 Feb 2012 12:46:39 +0000 (+0000) Subject: re PR rtl-optimization/51374 ([avr] insn combine reorders volatile memory accesses) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=619392851d273f47d04b7a09b83568d23183447f;p=gcc.git re PR rtl-optimization/51374 ([avr] insn combine reorders volatile memory accesses) PR rtl-optimization/51374 * gcc.target/avr/torture/pr51374-1.c: Also fail if SBIS is seen. From-SVN: r183798 --- diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 18a72769947..8179fc7924a 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,7 +1,13 @@ 2012-02-01 Georg-Johann Lay PR rtl-optimization/51374 - * testsuite/gcc.target/avr/torture/pr51374-1.c: New. + * gcc.target/avr/torture/pr51374-1.c: + Also fail if SBIS is seen. + +2012-02-01 Georg-Johann Lay + + PR rtl-optimization/51374 + * gcc.target/avr/torture/pr51374-1.c: New. 2012-01-31 Tobias Burnus diff --git a/gcc/testsuite/gcc.target/avr/torture/pr51374-1.c b/gcc/testsuite/gcc.target/avr/torture/pr51374-1.c index b31d17363cd..9c98ea5f8e0 100644 --- a/gcc/testsuite/gcc.target/avr/torture/pr51374-1.c +++ b/gcc/testsuite/gcc.target/avr/torture/pr51374-1.c @@ -12,3 +12,4 @@ void vector_18 (void) } /* { dg-final { scan-assembler-not "\tsbic " } } */ +/* { dg-final { scan-assembler-not "\tsbis " } } */