From: Luke Kenneth Casson Leighton Date: Thu, 18 Oct 2018 22:40:47 +0000 (+0100) Subject: srrl srli srai etc X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=61d9c0c9b865b4e067dbcad3fd776203a1254189;p=riscv-isa-sim.git srrl srli srai etc --- diff --git a/riscv/insns/sllw.h b/riscv/insns/sllw.h index 0b25be0..276e285 100644 --- a/riscv/insns/sllw.h +++ b/riscv/insns/sllw.h @@ -1,2 +1,2 @@ require_rv64; -WRITE_RD(sext32(rv_sl(RS1, (RS2 & 0x1F)))); +WRITE_RD(sext32(rv_sl(RS1, rv_and(RS2, sv_reg_t(0x1FU))))); diff --git a/riscv/insns/slt.h b/riscv/insns/slt.h index 650d333..5d6aeea 100644 --- a/riscv/insns/slt.h +++ b/riscv/insns/slt.h @@ -1 +1 @@ -WRITE_RD(rv_lt(sreg_t(RS1), sreg_t(RS2))); +WRITE_RD(rv_lt(sv_reg_to_sreg(RS1), sv_reg_to_sreg(RS2))); diff --git a/riscv/insns/slti.h b/riscv/insns/slti.h index 216e0eb..b4fd8f0 100644 --- a/riscv/insns/slti.h +++ b/riscv/insns/slti.h @@ -1 +1 @@ -WRITE_RD(rv_lt(sreg_t(RS1), sreg_t(insn.i_imm()))); +WRITE_RD(rv_lt(sv_reg_to_sreg(RS1), sv_reg_to_sreg(insn.i_imm()))); diff --git a/riscv/insns/sltiu.h b/riscv/insns/sltiu.h index a74d2ad..b0d66bd 100644 --- a/riscv/insns/sltiu.h +++ b/riscv/insns/sltiu.h @@ -1 +1 @@ -WRITE_RD(rv_lt(RS1, reg_t(insn.i_imm()))); +WRITE_RD(rv_lt(RS1, (insn.i_imm()))); diff --git a/riscv/insns/sra.h b/riscv/insns/sra.h index f3b4df2..5f0586f 100644 --- a/riscv/insns/sra.h +++ b/riscv/insns/sra.h @@ -1 +1,2 @@ -WRITE_RD(sext_xlen(rv_sr(sext_xlen(RS1), (RS2 & (xlen-1))))); +WRITE_RD(sext_xlen(rv_sr(sext_xlen(RS1), + rv_and(RS2, sv_reg_t(xlen-1))))); diff --git a/riscv/insns/srai.h b/riscv/insns/srai.h index f089b5b..2de77e3 100644 --- a/riscv/insns/srai.h +++ b/riscv/insns/srai.h @@ -1,2 +1,2 @@ -require(SHAMT < xlen); +require(rv_lt(SHAMT, sv_reg_t(xlen))); WRITE_RD(sext_xlen(rv_sr(sext_xlen(RS1), SHAMT))); diff --git a/riscv/insns/sraiw.h b/riscv/insns/sraiw.h index ac9832b..6c4d332 100644 --- a/riscv/insns/sraiw.h +++ b/riscv/insns/sraiw.h @@ -1,2 +1,2 @@ require_rv64; -WRITE_RD(sext32(rv_sr(int32_t(RS1), SHAMT))); +WRITE_RD(sext32(rv_sr(sv_reg_int32(RS1), SHAMT))); diff --git a/riscv/insns/sraw.h b/riscv/insns/sraw.h index b197770..ee7c69c 100644 --- a/riscv/insns/sraw.h +++ b/riscv/insns/sraw.h @@ -1,2 +1,2 @@ require_rv64; -WRITE_RD(sext32(rv_sr(int32_t(RS1), (RS2 & 0x1F)))); +WRITE_RD(sext32(rv_sr(sv_reg_int32(RS1), rv_and(RS2, sv_reg_t(0x1FU))))); diff --git a/riscv/insns/srl.h b/riscv/insns/srl.h index c6f92ac..c51d2ad 100644 --- a/riscv/insns/srl.h +++ b/riscv/insns/srl.h @@ -1 +1,2 @@ -WRITE_RD(sext_xlen(rv_sr(zext_xlen(RS1), (RS2 & (xlen-1))))); +WRITE_RD(sext_xlen(rv_sr(zext_xlen(RS1), + rv_and(RS2, sv_reg_t(xlen-1))))); diff --git a/riscv/insns/srli.h b/riscv/insns/srli.h index fa4d441..bca4c83 100644 --- a/riscv/insns/srli.h +++ b/riscv/insns/srli.h @@ -1,2 +1,2 @@ -require(SHAMT < xlen); +require(rv_lt(SHAMT, sv_reg_t(xlen))); WRITE_RD(sext_xlen(rv_sr(zext_xlen(RS1), SHAMT))); diff --git a/riscv/insns/srliw.h b/riscv/insns/srliw.h index d2850e4..357c724 100644 --- a/riscv/insns/srliw.h +++ b/riscv/insns/srliw.h @@ -1,2 +1,2 @@ require_rv64; -WRITE_RD(sext32(rv_sr((uint32_t)RS1, SHAMT))); +WRITE_RD(sext32(rv_sr(sv_reg_uint32(RS1), SHAMT))); diff --git a/riscv/insns/srlw.h b/riscv/insns/srlw.h index 45a2494..34b574e 100644 --- a/riscv/insns/srlw.h +++ b/riscv/insns/srlw.h @@ -1,2 +1,3 @@ require_rv64; -WRITE_RD(sext32(rv_sr((uint32_t)RS1, (RS2 & 0x1F)))); +WRITE_RD(sext32(rv_sr(sv_reg_uint32(RS1), + rv_and(RS2, sv_reg_t(0x1FU)))));