From: addw@fa2f8cb1790dfac204f803a3bfd8edda6ef3edc6 <addw@web>
Date: Tue, 29 Dec 2020 21:00:26 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~730
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=61e931f46a0cc7d4aa2377c39b8d70294f928207;p=libreriscv.git

---

diff --git a/openpower/isa.mdwn b/openpower/isa.mdwn
index 2dbf78f2b..cd264a971 100644
--- a/openpower/isa.mdwn
+++ b/openpower/isa.mdwn
@@ -1,5 +1,7 @@
 # ISA Pseudo-code 
 
+ISA is the [[!wikipedia Instruction_set_architecture]] of a machine, the: CPU instructions, register set, memory model, etc, that describe the way a machine works.
+
 These pages contain (in a strict machine-readable subset of mdwn)
 the pseudo-code for all opcodes in the POWER v3.0B Public Spec