From: Jan Hubicka <hubicka@gcc.gnu.org>
Date: Tue, 13 Feb 2001 10:47:03 +0000 (+0000)
Subject: Fix breakage in my previous checkin.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=62415523eb8b4369892c63aa5e51942423178b78;p=gcc.git

Fix breakage in my previous checkin.

From-SVN: r39623
---

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 4e5dffdbcf6..49d8376f83b 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -8814,15 +8814,15 @@ ix86_register_move_cost (mode, class1, class2)
      stall.  Count this as arbitarily high cost of 20.  */
   if (ix86_secondary_memory_needed (class1, class2, mode, 0))
     {
-      if (CLASS_MAX_NREGS (CLASS1, MODE) > CLASS_MAX_NREGS (CLASS2, MODE))
+      if (CLASS_MAX_NREGS (class1, mode) > CLASS_MAX_NREGS (class2, mode))
 	return 10;
-      return (MEMORY_MOVE_COST (MODE, CLASS1, 0)
-	      + MEMORY_MOVE_COST (MODE, CLASS2, 1));
+      return (MEMORY_MOVE_COST (mode, class1, 0)
+	      + MEMORY_MOVE_COST (mode, class2, 1));
     }
   /* Moves between SSE/MMX and integer unit are expensive.
      ??? We should make this cost CPU specific.  */
-  if (MMX_CLASS_P (CLASS1) != MMX_CLASS_P (CLASS2)
-      || SSE_CLASS_P (CLASS1) != SSE_CLASS_P (CLASS2))
+  if (MMX_CLASS_P (class1) != MMX_CLASS_P (class2)
+      || SSE_CLASS_P (class1) != SSE_CLASS_P (class2))
     return 3;
   return 2;
 }
@@ -8852,7 +8852,7 @@ ix86_hard_regno_mode_ok (regno, mode)
     return 0;
   /* Take care for QImode values - they can be in non-QI regs, but then
      they do cause partial register stalls.  */
-  if (QI_REG_P (regno) || mode != QImode)
+  if (regno < 4 || mode != QImode)
     return 1;
   return reload_in_progress || reload_completed || !TARGET_PARTIAL_REG_STALL;
 }