From: lkcl <lkcl@web>
Date: Wed, 20 Apr 2022 19:18:22 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2669
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6249d5284b12ef68f85d2d79f71d182c4f51db0a;p=libreriscv.git

---

diff --git a/openpower/sv/biginteger.mdwn b/openpower/sv/biginteger.mdwn
index ec4b4636c..2dcadbed8 100644
--- a/openpower/sv/biginteger.mdwn
+++ b/openpower/sv/biginteger.mdwn
@@ -164,7 +164,21 @@ fact big-integer multiply (more specifically, mul-and-subtract).
 
 # Instructions
 
-**DRAFT** Both `madded` and `msubed` are VA-Form:
+**DRAFT**
+
+The pseudocode for `msubed RT, RA, RB, RC`` is:
+
+    prod[0:127] = (RA) * (RB)
+    sub[0:127] = EXTZ(RC) - prod
+    RT <- sub[64:127]
+    RS <- sub[0:63] # RS is either RC or RT+VL
+
+Note that RC is not sign-extended to 64-bit.  In a Vector Loop
+it contains the top half of the previous multiply-with-subtract,
+and the current product must be subtracted from it.
+
+
+Both `madded` and `msubed` are VA-Form:
 
 |0.....5|6..10|11..15|16..20|21..25|26..31|
 |-------|-----|------|------|------|------|