From: Luke Kenneth Casson Leighton Date: Fri, 24 Jan 2020 15:11:59 +0000 (+0000) Subject: found bug in eq partition assignment X-Git-Tag: ls180-24jan2020~342 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=625cc843e27cdc81e9a14830cc4a3200142bfea6;p=ieee754fpu.git found bug in eq partition assignment --- diff --git a/src/ieee754/part_cmp/equal.py b/src/ieee754/part_cmp/equal.py index 7d5cd5a7..7728d4c3 100644 --- a/src/ieee754/part_cmp/equal.py +++ b/src/ieee754/part_cmp/equal.py @@ -29,6 +29,7 @@ class PartitionedEq(Elaboratable): def elaborate(self, platform): m = Module() + comb = m.d.comb # make a series of "eqs", splitting a and b into partition chunks eqs = Signal(self.mwidth, reset_less=True) @@ -39,21 +40,21 @@ class PartitionedEq(Elaboratable): end = keys[i] eql.append(self.a[start:end] == self.b[start:end]) start = end # for next time round loop - m.d.comb += eqs.eq(Cat(*eql)) + comb += eqs.eq(Cat(*eql)) # now, based on the partition points, create the (multi-)boolean result eqsigs = [] for i in range(self.mwidth): - eqsig = Signal(self.mwidth, name="eqsig%d"%i, reset_less=True) + eqsig = Signal(name="eqsig%d"%i, reset_less=True) if i == 0: - m.d.comb += eqsig.eq(eqs[i]) + comb += eqsig.eq(eqs[i]) else: ppt = self.partition_points[keys[i-1]] - m.d.comb += eqsig.eq(eqs[i] & ppt & eqsigs[i-1]) + comb += eqsig.eq(eqs[i] & ppt & eqsigs[i-1]) eqsigs.append(eqsig) print ("eqsigs", eqsigs, self.output.shape()) - # XXX moo?? something going on here - for i in range(self.mwidth): - m.d.comb += self.output[i].eq(eqsigs[i]) + + # assign cascade-SIMD-compares to output + comb += self.output.eq(Cat(*eqsigs)) return m