From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 21 Apr 2020 15:44:08 +0000 (+0000)
Subject: whoops
X-Git-Tag: partial-core-ls180-gdsii~130
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=627497d1e49f30bdd6e69a04e9614f0a0edeb10a;p=soclayout.git

whoops
---

diff --git a/experiments7/doAlu16.py b/experiments7/doAlu16.py
index 490f9b8..ba1424b 100755
--- a/experiments7/doAlu16.py
+++ b/experiments7/doAlu16.py
@@ -157,6 +157,22 @@ class ALU16(Module):
 
             self.create_pins()
 
+        if False:
+            print (dir(self.cell))
+            for net in self.cell.getNets():
+                print (net.getName())
+            print (self.cell.getNet("a(0)"))
+            print (dir(self.cell.getNet("a(0)")))
+            for inst in self.cell.getInstances():
+                for net in self.cell.getNets():
+                    if net.getName() == "a(1)":
+                        icell = inst.getMasterCell()
+                        #if len(list(icell.getInstances())) > 0:
+                            #continue # already placed, do not include it
+                        for net in icell.getNets():
+                            print ("inst", icell, "has nets", net.getName())
+            sys.exit(0)
+
         if self.editor:
             self.editor.setCell(self.cell)