From: Julian Brown <julian@codesourcery.com>
Date: Thu, 4 Jan 2007 15:33:12 +0000 (+0000)
Subject: 	* arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=62ac925e42ad66c2faf59bd78e182f822760bb56;p=binutils-gdb.git

	* arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
	vqrshl instructions.
---

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index cc5ec75d9c0..f5cb698ba16 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2007-01-04  Julian Brown  <julian@codesourcery.com>
+
+	* arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
+	vqrshl instructions.
+
 2006-12-27  Kazu Hirata  <kazu@codesourcery.com>
 
 	* m68k-dis.c (print_insn_arg): Add support for cac and mbb.
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 49765d86d4b..a1f250c10ec 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -576,10 +576,10 @@ static const struct opcode32 neon_opcodes[] =
   {FPU_NEON_EXT_V1, 0xf2000210, 0xfe800f10, "vqsub%c.%24?us%20-21S3\t%12-15,22R, %16-19,7R, %0-3,5R"},
   {FPU_NEON_EXT_V1, 0xf2000300, 0xfe800f10, "vcgt%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
   {FPU_NEON_EXT_V1, 0xf2000310, 0xfe800f10, "vcge%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
-  {FPU_NEON_EXT_V1, 0xf2000400, 0xfe800f10, "vshl%c.%24?us%20-21S3\t%12-15,22R, %16-19,7R, %0-3,5R"},
-  {FPU_NEON_EXT_V1, 0xf2000410, 0xfe800f10, "vqshl%c.%24?us%20-21S3\t%12-15,22R, %16-19,7R, %0-3,5R"},
-  {FPU_NEON_EXT_V1, 0xf2000500, 0xfe800f10, "vrshl%c.%24?us%20-21S3\t%12-15,22R, %16-19,7R, %0-3,5R"},
-  {FPU_NEON_EXT_V1, 0xf2000510, 0xfe800f10, "vqrshl%c.%24?us%20-21S3\t%12-15,22R, %16-19,7R, %0-3,5R"},
+  {FPU_NEON_EXT_V1, 0xf2000400, 0xfe800f10, "vshl%c.%24?us%20-21S3\t%12-15,22R, %0-3,5R, %16-19,7R"},
+  {FPU_NEON_EXT_V1, 0xf2000410, 0xfe800f10, "vqshl%c.%24?us%20-21S3\t%12-15,22R, %0-3,5R, %16-19,7R"},
+  {FPU_NEON_EXT_V1, 0xf2000500, 0xfe800f10, "vrshl%c.%24?us%20-21S3\t%12-15,22R, %0-3,5R, %16-19,7R"},
+  {FPU_NEON_EXT_V1, 0xf2000510, 0xfe800f10, "vqrshl%c.%24?us%20-21S3\t%12-15,22R, %0-3,5R, %16-19,7R"},
   {FPU_NEON_EXT_V1, 0xf2000600, 0xfe800f10, "vmax%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
   {FPU_NEON_EXT_V1, 0xf2000610, 0xfe800f10, "vmin%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
   {FPU_NEON_EXT_V1, 0xf2000700, 0xfe800f10, "vabd%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},