From: lkcl <lkcl@web>
Date: Wed, 22 Sep 2021 11:30:32 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~41
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=62c19f72ffacd280cb588b27f37903de3523b022;p=libreriscv.git

---

diff --git a/3d_gpu/architecture/dynamic_simd.mdwn b/3d_gpu/architecture/dynamic_simd.mdwn
index 465452067..157053e3b 100644
--- a/3d_gpu/architecture/dynamic_simd.mdwn
+++ b/3d_gpu/architecture/dynamic_simd.mdwn
@@ -78,7 +78,7 @@ A much more intelligent approach is needed. What we actually want is:
     with m.If(x > y): # do a partitioned compare here
          do something dynamic here
 
-where behind the scenes the above laborious for-loops (conceptually) are created, hidden, behind the scenes, looking to all intents and purposes that this is exactly like any other nmigen Signal.
+where behind the scenes the above laborious for-loops (conceptually) are created, hidden, looking to all intents and purposes that this is exactly like any other nmigen Signal.
 
 This means that nmigen needs to "understand" the partitioning, in m.If, m.Else and m.Switch, at the bare minimum.