From: lkcl <lkcl@web>
Date: Sat, 29 May 2021 17:56:33 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~859
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6300d93a135ba687a64fd3fe01b52d4b26206fdf;p=libreriscv.git

---

diff --git a/openpower/sv/ldst.mdwn b/openpower/sv/ldst.mdwn
index f46b0498e..70ca256f9 100644
--- a/openpower/sv/ldst.mdwn
+++ b/openpower/sv/ldst.mdwn
@@ -53,11 +53,11 @@ with the pseudocode below, the immediate can be used to give unit stride or elem
         if svctx.ldstmode == elementstride:
           # element stride mode
           srcbase = ireg[RA]
-          offs = i * immed
+          offs = i * immed              # j*immed for a ST
         elif svctx.ldstmode == unitstride:
           # unit stride mode
           srcbase = ireg[RA]
-          offs = immed + (i * op_width)
+          offs = immed + (i * op_width) # j*op_width for ST
         elif RA.isvec:
           # quirky Vector indexed mode but with an immediate
           srcbase = ireg[RA+i]