From: Eddie Hung <eddie@fpgeh.com>
Date: Thu, 16 Apr 2020 17:25:22 +0000 (-0700)
Subject: Revert "Merge pull request #1917 from YosysHQ/eddie/abc9_delay_check"
X-Git-Tag: working-ls180~549^2~32
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=63246a5c0eb5780675384d00443e6e46b5e59603;p=yosys.git

Revert "Merge pull request #1917 from YosysHQ/eddie/abc9_delay_check"

This reverts commit 759283fa65b1195ebe3a5bc6890ec622febca0eb, reversing
changes made to f41c7ccfff4bf104c646ca4b85e079a0f91c9151.
---

diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc
index 6f0ed6e89..ddda1bd5a 100644
--- a/backends/aiger/xaiger.cc
+++ b/backends/aiger/xaiger.cc
@@ -293,10 +293,6 @@ struct XAigerWriter
 				if (abc9_flop)
 					continue;
 			}
-			else {
-				if (cell->type == ID($__ABC9_DELAY))
-					log_error("Cell type '%s' not recognised. Check that '+/abc9_model.v' has been read.\n", cell->type.c_str());
-			}
 
 			bool cell_known = inst_module || cell->known();
 			for (const auto &c : cell->connections()) {