From: Rob Clark <robclark@freedesktop.org>
Date: Wed, 22 Apr 2015 17:07:33 +0000 (-0400)
Subject: freedreno/nir: sysval fixes
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=632ea2a1139f4b228ca55331e411dbae9920c28d;p=mesa.git

freedreno/nir: sysval fixes

Signed-off-by: Rob Clark <robclark@freedesktop.org>
---

diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
index 7a244d8a4c5..353873daa05 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
@@ -302,7 +302,7 @@ fd4_emit_vertex_bufs(struct fd_ringbuffer *ring, struct fd4_emit *emit)
 
 	for (i = 0; i < vp->inputs_count; i++) {
 		uint8_t semantic = sem2name(vp->inputs[i].semantic);
-		if (semantic == TGSI_SEMANTIC_VERTEXID)
+		if (semantic == TGSI_SEMANTIC_VERTEXID_NOBASE)
 			vertex_regid = vp->inputs[i].regid;
 		else if (semantic == TGSI_SEMANTIC_INSTANCEID)
 			instance_regid = vp->inputs[i].regid;
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
index e5f6c2a5e83..05e7049ad55 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
@@ -1140,6 +1140,7 @@ static void add_sysval_input(struct ir3_compile *ctx, unsigned name,
 	so->inputs[n].interpolate = TGSI_INTERPOLATE_CONSTANT;
 	so->total_in++;
 
+	ctx->block->ninputs = MAX2(ctx->block->ninputs, r + 1);
 	ctx->block->inputs[r] = instr;
 }
 
@@ -1785,16 +1786,22 @@ emit_instructions(struct ir3_compile *ctx)
 	unsigned noutputs = exec_list_length(&ctx->s->outputs) * 4;
 
 	/* we need to allocate big enough outputs array so that
-	 * we can stuff the kill's at the end:
+	 * we can stuff the kill's at the end.  Likewise for vtx
+	 * shaders, we need to leave room for sysvals:
 	 */
-	if (ctx->so->type == SHADER_FRAGMENT)
+	if (ctx->so->type == SHADER_FRAGMENT) {
 		noutputs += ARRAY_SIZE(ctx->kill);
+	} else if (ctx->so->type == SHADER_VERTEX) {
+		ninputs += 8;
+	}
 
 	ctx->block = ir3_block_create(ctx->ir, 0, ninputs, noutputs);
 
-	if (ctx->so->type == SHADER_FRAGMENT)
+	if (ctx->so->type == SHADER_FRAGMENT) {
 		ctx->block->noutputs -= ARRAY_SIZE(ctx->kill);
-
+	} else if (ctx->so->type == SHADER_VERTEX) {
+		ctx->block->ninputs -= 8;
+	}
 
 	/* for fragment shader, we have a single input register (usually
 	 * r0.xy) which is used as the base for bary.f varying fetch instrs: