From: Clifford Wolf <clifford@clifford.at>
Date: Sat, 25 May 2019 15:45:14 +0000 (+0200)
Subject: Fix handling of offset and upto module ports in write_blif, fixes #1040
X-Git-Tag: yosys-0.9~111^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6352df42ae3f41880c309d00df2db2eba9126d42;p=yosys.git

Fix handling of offset and upto module ports in write_blif, fixes #1040

Signed-off-by: Clifford Wolf <clifford@clifford.at>
---

diff --git a/backends/blif/blif.cc b/backends/blif/blif.cc
index b6dbd84cb..a1761b662 100644
--- a/backends/blif/blif.cc
+++ b/backends/blif/blif.cc
@@ -409,12 +409,26 @@ struct BlifDumper
 
 			f << stringf(".%s %s", subckt_or_gate(cell->type.str()), cstr(cell->type));
 			for (auto &conn : cell->connections())
-			for (int i = 0; i < conn.second.size(); i++) {
-				if (conn.second.size() == 1)
-					f << stringf(" %s", cstr(conn.first));
-				else
-					f << stringf(" %s[%d]", cstr(conn.first), i);
-				f << stringf("=%s", cstr(conn.second.extract(i, 1)));
+			{
+				if (conn.second.size() == 1) {
+					f << stringf(" %s=%s", cstr(conn.first), cstr(conn.second[0]));
+					continue;
+				}
+
+				Module *m = design->module(cell->type);
+				Wire *w = m ? m->wire(conn.first) : nullptr;
+
+				if (w == nullptr) {
+					for (int i = 0; i < GetSize(conn.second); i++)
+						f << stringf(" %s[%d]=%s", cstr(conn.first), i, cstr(conn.second[i]));
+				} else {
+					for (int i = 0; i < std::min(GetSize(conn.second), GetSize(w)); i++) {
+						SigBit sig(w, i);
+						f << stringf(" %s[%d]=%s", cstr(conn.first), sig.wire->upto ?
+								sig.wire->start_offset+sig.wire->width-sig.offset-1 :
+								sig.wire->start_offset+sig.offset, cstr(conn.second[i]));
+					}
+				}
 			}
 			f << stringf("\n");