From: Eric Van Hensbergen <eric.vanhensbergen@arm.com>
Date: Fri, 9 May 2014 22:58:46 +0000 (-0400)
Subject: arm: Add Makefile for aarch64 build of util/m5
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=636afeaa777f7b67deb4d977bc8d010c5b89faa3;p=gem5.git

arm: Add Makefile for aarch64 build of util/m5
---

diff --git a/util/m5/Makefile.aarch64 b/util/m5/Makefile.aarch64
new file mode 100644
index 000000000..907ad9434
--- /dev/null
+++ b/util/m5/Makefile.aarch64
@@ -0,0 +1,87 @@
+# Copyright (c) 2010 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Copyright (c) 2005-2006 The Regents of The University of Michigan
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Nathan Binkert
+#          Ali Saidi
+
+### If we are not compiling on an arm v8, we must use cross tools ###
+ifneq ($(shell uname -m), aarch64)
+CROSS_COMPILE?=aarch64-linux-gnu-
+endif
+CC=$(CROSS_COMPILE)gcc
+AS=$(CROSS_COMPILE)as
+LD=$(CROSS_COMPILE)ld
+AR=$(CROSS_COMPILE)ar
+
+JC=javac
+JH=javah
+JR=jar
+### JDK_PATH must be set to build gem5OpJni
+#JDK_PATH=/path/to/jdk/version_number
+
+CFLAGS=-O2 -I $(JDK_PATH)/include/ -I $(JDK_PATH)/include/linux -march=armv8-a
+LDFLAGS=-static -L. -lm5
+
+LIB_OBJS=m5op_arm_A64.o
+OBJS=m5.o
+JNI_OBJS=m5op_arm_A64.o jni_gem5Op.o
+
+all: libm5.a m5
+
+%.o: %.S
+	$(CC) $(CFLAGS) -o $@ -c $<
+
+%.o: %.c
+	$(CC)  $(CFLAGS) -o $@ -c $<
+
+m5: $(OBJS) libm5.a
+	$(CC) -o $@ $(OBJS) $(LDFLAGS)
+
+libm5.a: $(LIB_OBJS)
+	$(AR) rcs $@ $<
+
+gem5OpJni: gem5OpJni.jar $(JNI_OBJS)
+	$(CC) --shared -o lib$@.so $(JNI_OBJS)
+
+gem5OpJni.jar:
+	$(JC) jni/gem5Op.java; \
+	$(JH) jni.gem5Op; \
+	$(JR) cvf $@ jni/*.class
+
+clean:
+	rm -f *.o m5 libgemOpJni.so gem5OpJni.jar jni/*.class libm5.a
diff --git a/util/m5/m5op_arm_A64.S b/util/m5/m5op_arm_A64.S
index a422a3050..faba78c8e 100644
--- a/util/m5/m5op_arm_A64.S
+++ b/util/m5/m5op_arm_A64.S
@@ -73,6 +73,7 @@ func:
 #define RPNS INST(m5_op, 0, 0, rpns_func)
 #define WAKE_CPU INST(m5_op, 0, 0, wakecpu_func)
 #define M5EXIT INST(m5_op, 0, 0, exit_func)
+#define M5FAIL INST(m5_op, 0, 0, fail_func)
 #define INITPARAM INST(m5_op, 0, 0, initparam_func)
 #define LOADSYMBOL INST(m5_op, 0, 0, loadsymbol_func)
 #define RESET_STATS INST(m5_op, 0, 0, resetstats_func)
@@ -115,6 +116,7 @@ SIMPLE_OP(quiesceTime, QUIESCETIME)
 SIMPLE_OP(rpns, RPNS)
 SIMPLE_OP(wakeCPU, WAKE_CPU)
 SIMPLE_OP(m5_exit, M5EXIT)
+SIMPLE_OP(m5_fail, M5FAIL)
 SIMPLE_OP(m5_initparam, INITPARAM)
 SIMPLE_OP(m5_loadsymbol, LOADSYMBOL)
 SIMPLE_OP(m5_reset_stats, RESET_STATS)