From: Andrew Waterman Date: Tue, 26 Oct 2010 22:04:05 +0000 (-0700) Subject: [sim] removed unnecessary trap in mfcr instruction X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=63844a7558c1ed6c361081b5bc2fbdaf746bd582;p=riscv-isa-sim.git [sim] removed unnecessary trap in mfcr instruction --- diff --git a/riscv/insns/mfcr.h b/riscv/insns/mfcr.h index de3c19d..1c7ec2d 100644 --- a/riscv/insns/mfcr.h +++ b/riscv/insns/mfcr.h @@ -10,9 +10,6 @@ switch(insn.rtype.rs2) val = 32; // synci_step break; - case 29: - throw trap_illegal_instruction; - default: val = -1; }