From: Samuel Pitoiset Date: Tue, 11 Aug 2020 08:00:42 +0000 (+0200) Subject: radv: fix emitting the border color pointer on the compute queue X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=638a09b827f1e7b561e878612890fc0ebcdb1613;p=mesa.git radv: fix emitting the border color pointer on the compute queue This was just missing. Fixes: 57e796a12a8 ("radv: Implement VK_EXT_custom_border_color") Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen Reviewed-by: John Galt Part-of: --- diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 275bbe52553..d36f9a188d6 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -3399,8 +3399,7 @@ radv_init_graphics_state(struct radeon_cmdbuf *cs, struct radv_queue *queue) static void radv_init_compute_state(struct radeon_cmdbuf *cs, struct radv_queue *queue) { - struct radv_physical_device *physical_device = queue->device->physical_device; - si_emit_compute(physical_device, cs); + si_emit_compute(queue->device, cs); } static VkResult diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 8c016bb4d4f..f5a38b33392 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -1430,7 +1430,7 @@ bool radv_cmd_buffer_uses_mec(struct radv_cmd_buffer *cmd_buffer); void si_emit_graphics(struct radv_device *device, struct radeon_cmdbuf *cs); -void si_emit_compute(struct radv_physical_device *physical_device, +void si_emit_compute(struct radv_device *device, struct radeon_cmdbuf *cs); void cik_create_gfx_config(struct radv_device *device); diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index d3b0fd24f47..8af0d831c3a 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -78,7 +78,7 @@ si_write_harvested_raster_configs(struct radv_physical_device *physical_device, } void -si_emit_compute(struct radv_physical_device *physical_device, +si_emit_compute(struct radv_device *device, struct radeon_cmdbuf *cs) { radeon_set_sh_reg_seq(cs, R_00B810_COMPUTE_START_X, 3); @@ -92,7 +92,7 @@ si_emit_compute(struct radv_physical_device *physical_device, radeon_emit(cs, S_00B858_SH0_CU_EN(0xffff) | S_00B858_SH1_CU_EN(0xffff)); radeon_emit(cs, S_00B858_SH0_CU_EN(0xffff) | S_00B858_SH1_CU_EN(0xffff)); - if (physical_device->rad_info.chip_class >= GFX7) { + if (device->physical_device->rad_info.chip_class >= GFX7) { /* Also set R_00B858_COMPUTE_STATIC_THREAD_MGMT_SE2 / SE3 */ radeon_set_sh_reg_seq(cs, R_00B864_COMPUTE_STATIC_THREAD_MGMT_SE2, 2); @@ -100,14 +100,22 @@ si_emit_compute(struct radv_physical_device *physical_device, S_00B858_SH1_CU_EN(0xffff)); radeon_emit(cs, S_00B858_SH0_CU_EN(0xffff) | S_00B858_SH1_CU_EN(0xffff)); + + if (device->border_color_data.bo) { + uint64_t bc_va = radv_buffer_get_va(device->border_color_data.bo); + + radeon_set_uconfig_reg_seq(cs, R_030E00_TA_CS_BC_BASE_ADDR, 2); + radeon_emit(cs, bc_va >> 8); + radeon_emit(cs, S_030E04_ADDRESS(bc_va >> 40)); + } } - if (physical_device->rad_info.chip_class >= GFX9) { + if (device->physical_device->rad_info.chip_class >= GFX9) { radeon_set_uconfig_reg(cs, R_0301EC_CP_COHER_START_DELAY, - physical_device->rad_info.chip_class >= GFX10 ? 0x20 : 0); + device->physical_device->rad_info.chip_class >= GFX10 ? 0x20 : 0); } - if (physical_device->rad_info.chip_class >= GFX10) { + if (device->physical_device->rad_info.chip_class >= GFX10) { radeon_set_sh_reg(cs, R_00B890_COMPUTE_USER_ACCUM_0, 0); radeon_set_sh_reg(cs, R_00B894_COMPUTE_USER_ACCUM_1, 0); radeon_set_sh_reg(cs, R_00B898_COMPUTE_USER_ACCUM_2, 0); @@ -121,12 +129,17 @@ si_emit_compute(struct radv_physical_device *physical_device, * kernel if we want to use something other than the default value, * which is now 0x22f. */ - if (physical_device->rad_info.chip_class <= GFX6) { + if (device->physical_device->rad_info.chip_class <= GFX6) { /* XXX: This should be: * (number of compute units) * 4 * (waves per simd) - 1 */ radeon_set_sh_reg(cs, R_00B82C_COMPUTE_MAX_WAVE_ID, 0x190 /* Default value */); + + if (device->border_color_data.bo) { + uint64_t bc_va = radv_buffer_get_va(device->border_color_data.bo); + radeon_set_config_reg(cs, R_00950C_TA_CS_BC_BASE_ADDR, bc_va >> 8); + } } } @@ -559,7 +572,7 @@ si_emit_graphics(struct radv_device *device, S_028818_VPORT_Y_SCALE_ENA(1) | S_028818_VPORT_Y_OFFSET_ENA(1) | S_028818_VPORT_Z_SCALE_ENA(1) | S_028818_VPORT_Z_OFFSET_ENA(1)); - si_emit_compute(physical_device, cs); + si_emit_compute(device, cs); } void