From: lkcl <lkcl@web>
Date: Sun, 21 Aug 2022 20:56:03 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~796
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=63964344df0b8422993eaac59eed43f96b932fcd;p=libreriscv.git

---

diff --git a/openpower/sv/cr_ops.mdwn b/openpower/sv/cr_ops.mdwn
index 9e0460463..c5899e5fe 100644
--- a/openpower/sv/cr_ops.mdwn
+++ b/openpower/sv/cr_ops.mdwn
@@ -21,10 +21,10 @@ Simple-V to cover CR Operations, especially given that Vectorised Rc=1
 may be processed by Vectorised CR Operations tbat usefully in turn
 may become Predicate Masks to yet more Vector operations, like so:
 
-    sv.cmpi/ew=8 *BA,*ra,0      # compare bytes against zero
-    sv.cmpi/ew=8 *BA2,*ra,13.   # and against newline
-    sv.cror PM.EQ,BA.EQ,BA2.EQ  # OR compares to create predicate mask
-    sv.st/sm=EQ/ew=8 ...        # store only nonzero/newline
+    sv.cmpi/ew=8 *B,*ra,0    # compare bytes against zero
+    sv.cmpi/ew=8 *B2,*ra,13. # and against newline
+    sv.cror PM.EQ,B.EQ,B2.EQ # OR compares to create mask
+    sv.stb/sm=EQ    ...      # store only nonzero/newline
 
 Element width however is clearly meaningless for a 4-bit
 collation of Conditions, EQ LT GE SO. Likewise, arithmetic saturation