From: Luke Kenneth Casson Leighton Date: Sat, 25 May 2019 17:21:20 +0000 (+0100) Subject: branch success/fail nearly there X-Git-Tag: div_pipeline~1946 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=63f09d101fde12f3ef5bbd1ae9db8df055a1fb83;p=soc.git branch success/fail nearly there --- diff --git a/src/experiment/score6600.py b/src/experiment/score6600.py index c7a36b26..1cc43dcc 100644 --- a/src/experiment/score6600.py +++ b/src/experiment/score6600.py @@ -16,6 +16,7 @@ from alu_hier import ALU, BranchALU from nmutil.latch import SRLatch from random import randint, seed +from copy import deepcopy class CompUnits(Elaboratable): @@ -392,7 +393,9 @@ class Scoreboard(Elaboratable): # instruction being issued (fn_issue_o) has a shadow cast by the branch with m.If(self.branch_succ_i | self.branch_fail_i): - comb += bshadow.shadow_i[fn_issue_o][0].eq(1) + for i in range(n_int_fus): + with m.If(fn_issue_o & (Const(1<= 4 if is_branch: branch_ok, branch_fail = dest - dest = -1 + dest = src2 # ok zip up the branch success / fail instructions and # drop them into the queue, one marked "to have branch success" # the other to be marked shadow branch "fail". @@ -620,9 +627,10 @@ def scoreboard_branch_sim(dut, alusim): for ok, fl in zip(branch_ok, branch_fail): instrs.append((ok[0], ok[1], ok[2], ok[3], (1, 0))) instrs.append((fl[0], fl[1], fl[2], fl[3], (0, 1))) - print ("instr %d: (%d, %d, %d, %d)" % (i, src1, src2, dest, op)) + print ("instr %d: (%d, %d, %d, %d, %d, %d)" % \ + (i, src1, src2, dest, op, shadow_on, shadow_off)) yield from int_instr(dut, op, src1, src2, dest, - shadow_on, shadow_off) + shadow_on, shadow_off) yield yield from wait_for_issue(dut) branch_direction = yield dut.branch_direction_o # way branch went @@ -631,17 +639,20 @@ def scoreboard_branch_sim(dut, alusim): yield yield from wait_for_busy_clear(dut) - for (src1, src2, dest, op, (shadow_on, shadow_off)) in insts: + i = -1 + for (src1, src2, dest, op, (shadow_on, shadow_off)) in siminsts: + i += 1 is_branch = op >= 4 if is_branch: branch_ok, branch_fail = dest - dest = None + dest = src2 + print ("sim %d: (%d, %d, %d, %d)" % (i, src1, src2, dest, op)) branch_res = alusim.op(op, src1, src2, dest) if is_branch: if branch_res: - insts.append(branch_ok) + siminsts += branch_ok else: - insts.append(branch_fail) + siminsts += branch_fail # check status yield from alusim.check(dut) diff --git a/src/scoreboard/shadow.py b/src/scoreboard/shadow.py index cd4089d7..841dcd67 100644 --- a/src/scoreboard/shadow.py +++ b/src/scoreboard/shadow.py @@ -207,23 +207,14 @@ class BranchSpeculationRecord(Elaboratable): m.d.sync += good_r[i].eq(good_r[i] | self.good_i[i]) m.d.sync += fail_r[i].eq(fail_r[i] | self.fail_i[i]) with m.If(self.br_i): - # we expected fail, return OK that fail was EXPECTED... OR... - # we expected good, return OK that good was EXPECTED - good = Signal(reset_less=True) - fail = Signal(reset_less=True) - with m.If(self.br_ok_i): - m.d.comb += good.eq(good_r[i]) - m.d.comb += fail.eq(fail_r[i]) - with m.Else(): - m.d.comb += good.eq(~good_r[i]) - m.d.comb += fail.eq(~fail_r[i]) - # ... but only set these where a good or fail *is* expected... with m.If(good_r[i]): + # we expected good, return OK that good was EXPECTED m.d.comb += self.match_g_o[i].eq(self.br_ok_i) m.d.comb += self.match_f_o[i].eq(~self.br_ok_i) with m.If(fail_r[i]): - m.d.comb += self.match_f_o[i].eq(~self.br_ok_i) - m.d.comb += self.match_g_o[i].eq(self.br_ok_i) + # we expected fail, return OK that fail was EXPECTED + m.d.comb += self.match_g_o[i].eq(~self.br_ok_i) + m.d.comb += self.match_f_o[i].eq(self.br_ok_i) m.d.sync += good_r[i].eq(0) # might be set if issue set as well m.d.sync += fail_r[i].eq(0) # might be set if issue set as well