From: Marcelina Kościelnicka <mwk@0x04.net>
Date: Wed, 4 Aug 2021 01:33:41 +0000 (+0200)
Subject: memory_share: Don't skip ports with EN wired to input for SAT sharing.
X-Git-Tag: yosys-0.10~64
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=63f9e0544fcb793dcc47b9c5a6d8b0e46d84a225;p=yosys.git

memory_share: Don't skip ports with EN wired to input for SAT sharing.

Fixes #2912.
---

diff --git a/passes/memory/memory_share.cc b/passes/memory/memory_share.cc
index 846583c2c..4e6a30ef1 100644
--- a/passes/memory/memory_share.cc
+++ b/passes/memory/memory_share.cc
@@ -288,8 +288,7 @@ struct MemoryShareWorker
 			for (auto bit : bits)
 				if (bit == RTLIL::State::S1)
 					goto port_is_always_active;
-			if (modwalker.has_drivers(bits))
-				eligible_ports.insert(i);
+			eligible_ports.insert(i);
 		port_is_always_active:;
 		}
 
@@ -310,7 +309,6 @@ struct MemoryShareWorker
 			if (checked_ports.count(i))
 				continue;
 
-
 			std::vector<int> group;
 			group.push_back(i);