From: Eric Anholt Date: Tue, 27 Aug 2013 19:30:39 +0000 (-0700) Subject: i965: Directly call intel_batchbuffer_flush() after i915 split. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6404fcb266753a2fd8243210b3553bfe846ce104;p=mesa.git i965: Directly call intel_batchbuffer_flush() after i915 split. intel_flush() now did nothing except call through (and intel_batchbuffer_flush() does the no-op check, too!) Reviewed-by: Kenneth Graunke Reviewed-by: Paul Berry --- diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index 1c85921476b..da523e5bffe 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -49,12 +49,10 @@ void gen6_blorp_emit_batch_head(struct brw_context *brw, const brw_blorp_params *params) { - struct gl_context *ctx = &brw->ctx; - /* To ensure that the batch contains only the resolve, flush the batch * before beginning and after finishing emitting the resolve packets. */ - intel_flush(ctx); + intel_batchbuffer_flush(brw); } diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c b/src/mesa/drivers/dri/i965/intel_buffer_objects.c index 663cc298984..21d37279245 100644 --- a/src/mesa/drivers/dri/i965/intel_buffer_objects.c +++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.c @@ -291,7 +291,7 @@ intel_bufferobj_map_range(struct gl_context * ctx, } else { perf_debug("Stalling on the GPU for mapping a busy buffer " "object\n"); - intel_flush(ctx); + intel_batchbuffer_flush(brw); } } else if (drm_intel_bo_busy(intel_obj->buffer) && (access & GL_MAP_INVALIDATE_BUFFER_BIT)) { diff --git a/src/mesa/drivers/dri/i965/intel_context.c b/src/mesa/drivers/dri/i965/intel_context.c index 37c17705a3b..9a089bf0261 100644 --- a/src/mesa/drivers/dri/i965/intel_context.c +++ b/src/mesa/drivers/dri/i965/intel_context.c @@ -349,21 +349,12 @@ intelInvalidateState(struct gl_context * ctx, GLuint new_state) brw->NewGLState |= new_state; } -void -_intel_flush(struct gl_context *ctx, const char *file, int line) -{ - struct brw_context *brw = brw_context(ctx); - - if (brw->batch.used) - _intel_batchbuffer_flush(brw, file, line); -} - static void intel_glFlush(struct gl_context *ctx) { struct brw_context *brw = brw_context(ctx); - intel_flush(ctx); + intel_batchbuffer_flush(brw); intel_flush_front(ctx); if (brw->is_front_buffer_rendering) brw->need_throttle = true; @@ -374,7 +365,7 @@ intelFinish(struct gl_context * ctx) { struct brw_context *brw = brw_context(ctx); - intel_flush(ctx); + intel_batchbuffer_flush(brw); intel_flush_front(ctx); if (brw->batch.last_bo) @@ -816,7 +807,7 @@ intel_query_dri2_buffers(struct brw_context *brw, * query, we need to make sure all the pending drawing has landed in the * real front buffer. */ - intel_flush(&brw->ctx); + intel_batchbuffer_flush(brw); intel_flush_front(&brw->ctx); attachments[i++] = __DRI_BUFFER_FRONT_LEFT; @@ -828,7 +819,7 @@ intel_query_dri2_buffers(struct brw_context *brw, * So before doing the query, make sure all the pending drawing has * landed in the real front buffer. */ - intel_flush(&brw->ctx); + intel_batchbuffer_flush(brw); intel_flush_front(&brw->ctx); } diff --git a/src/mesa/drivers/dri/i965/intel_context.h b/src/mesa/drivers/dri/i965/intel_context.h index 734c57cdc03..f35dafa2359 100644 --- a/src/mesa/drivers/dri/i965/intel_context.h +++ b/src/mesa/drivers/dri/i965/intel_context.h @@ -250,9 +250,6 @@ extern bool intelInitContext(struct brw_context *brw, unsigned *dri_ctx_error); extern void intelFinish(struct gl_context * ctx); -extern void _intel_flush(struct gl_context * ctx, const char *file, int line); - -#define intel_flush(ctx) _intel_flush(ctx, __FILE__, __LINE__) extern void intelInitDriverFunctions(struct dd_function_table *functions); diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 950ef573ca5..f8cf96f1627 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -1626,7 +1626,6 @@ intel_miptree_upsample(struct brw_context *brw, void * intel_miptree_map_raw(struct brw_context *brw, struct intel_mipmap_tree *mt) { - struct gl_context *ctx = &brw->ctx; /* CPU accesses to color buffers don't understand fast color clears, so * resolve any pending fast color clears before we map. */ @@ -1640,7 +1639,7 @@ intel_miptree_map_raw(struct brw_context *brw, struct intel_mipmap_tree *mt) } } - intel_flush(ctx); + intel_batchbuffer_flush(brw); if (mt->region->tiling != I915_TILING_NONE) drm_intel_gem_bo_map_gtt(bo); diff --git a/src/mesa/drivers/dri/i965/intel_pixel_copy.c b/src/mesa/drivers/dri/i965/intel_pixel_copy.c index c935c4c3e20..9dc5c152650 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_copy.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_copy.c @@ -40,6 +40,7 @@ #include "intel_pixel.h" #include "intel_fbo.h" #include "intel_blit.h" +#include "intel_batchbuffer.h" #define FILE_DEBUG_FLAG DEBUG_PIXEL @@ -144,7 +145,7 @@ do_blit_copypixels(struct gl_context * ctx, intel_prepare_render(brw); - intel_flush(&brw->ctx); + intel_batchbuffer_flush(brw); /* Clip to destination buffer. */ orig_dstx = dstx; diff --git a/src/mesa/drivers/dri/i965/intel_syncobj.c b/src/mesa/drivers/dri/i965/intel_syncobj.c index 8f075dd6f6a..b7875eeba3d 100644 --- a/src/mesa/drivers/dri/i965/intel_syncobj.c +++ b/src/mesa/drivers/dri/i965/intel_syncobj.c @@ -77,7 +77,7 @@ intel_fence_sync(struct gl_context *ctx, struct gl_sync_object *s, sync->bo = brw->batch.bo; drm_intel_bo_reference(sync->bo); - intel_flush(ctx); + intel_batchbuffer_flush(brw); } static void intel_client_wait_sync(struct gl_context *ctx, struct gl_sync_object *s,