From: Matthew Malcomson Date: Thu, 14 Feb 2019 14:51:46 +0000 (+0000) Subject: When this testcase was introduced it failed to account for the possibility of... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6461bdc48fa3f98015584953598a83f8c7caa506;p=gcc.git When this testcase was introduced it failed to account for the possibility of... When this testcase was introduced it failed to account for the possibility of targets that do not support arm mode or that do not support the ldrd/strd instructions. This patch accounts for both of these by adding some dg-require-effective-target lines to the testcase. This patch also adds a new effective-target procedure to check a target supports ldrd/strd. This patch also adds a new effective-target procedure to check a target supports arm ldrd/strd. The check uses the 'r' constraint to ensure SP is not used so that it will work for thumb mode code generation as well as arm mode. Tested by running this testcase with cross compilers using "-march=armv5t", "-mcpu=cortex-m3", "-mcpu-arm7tdmi", "-mcpu=cortex-a9 -march=armv5t" for both arm-none-eabi and arm-none-linux-gnueabihf. Also ran this testcase with `make check` natively. gcc/testsuite/ChangeLog: 2019-02-14 Matthew Malcomson * gcc.dg/rtl/arm/ldrd-peepholes.c: Restrict testcase. * lib/target-supports.exp: Add procedure to check for ldrd. From-SVN: r268881 --- diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 6a649831c94..1d0a0fd5c49 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2019-02-14 Matthew Malcomson + + * gcc.dg/rtl/arm/ldrd-peepholes.c: Restrict testcase. + * lib/target-supports.exp: Add procedure to check for ldrd. + 2019-02-14 Cesar Philippidis PR fortran/72715 diff --git a/gcc/testsuite/gcc.dg/rtl/arm/ldrd-peepholes.c b/gcc/testsuite/gcc.dg/rtl/arm/ldrd-peepholes.c index 4c3949c0963..cbb64a770f5 100644 --- a/gcc/testsuite/gcc.dg/rtl/arm/ldrd-peepholes.c +++ b/gcc/testsuite/gcc.dg/rtl/arm/ldrd-peepholes.c @@ -1,4 +1,6 @@ /* { dg-do compile { target arm*-*-* } } */ +/* { dg-require-effective-target arm_arm_ok } */ +/* { dg-require-effective-target arm_ldrd_strd_ok } */ /* { dg-skip-if "Ensure only targetting arm with TARGET_LDRD" { *-*-* } { "-mthumb" } { "" } } */ /* { dg-options "-O3 -marm -fdump-rtl-peephole2" } */ diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index a0b4b99067f..5e532555085 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -4918,6 +4918,26 @@ proc check_effective_target_arm_prefer_ldrd_strd { } { } "-O2 -mthumb" ] } +# Return true if LDRD/STRD instructions are available on this target. +proc check_effective_target_arm_ldrd_strd_ok { } { + if { ![check_effective_target_arm32] } { + return 0; + } + + return [check_no_compiler_messages arm_ldrd_strd_ok object { + int main(void) + { + __UINT64_TYPE__ a = 1, b = 10; + __UINT64_TYPE__ *c = &b; + // `a` will be in a valid register since it's a DImode quantity. + asm ("ldrd %0, %1" + : "=r" (a) + : "m" (c)); + return a == 10; + } + }] +} + # Return 1 if this is a PowerPC target supporting -meabi. proc check_effective_target_powerpc_eabi_ok { } {