From: Jan Beulich <jbeulich@suse.com>
Date: Thu, 17 Mar 2022 10:01:38 +0000 (+0100)
Subject: x86: assorted IAMCU CPU checking fixes
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=648d04db39d0f8d69d5f4d47a86c7bd9ecc10e85;p=binutils-gdb.git

x86: assorted IAMCU CPU checking fixes

The checks done by check_cpu_arch_compatible() were halfway sensible
only at the time where only L1OM support was there. The purpose,
however, has always been to prevent bad uses of .arch (turning off the
base CPU "feature" flag) while at the same time permitting extensions to
be enabled / disabled. In order to achieve this (and to prevent
regressions when L1OM and K1OM support are removed)
- set CpuIAMCU in CPU_IAMCU_FLAGS,
- adjust the IAMCU check in the function itself (the other two similarly
  broken checks aren't adjusted as they're slated to be removed anyway),
- avoid calling the function for extentions (which would never have the
  base "feature" flag set),
- add a new testcase actually exercising ".arch iamcu" (which would also
  regress with the planned removal).
---

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index e0632681477..e1fd75856ad 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -2839,8 +2839,8 @@ check_cpu_arch_compatible (const char *name ATTRIBUTE_UNUSED,
     }
 
   /* If we are targeting Intel MCU, we must enable it.  */
-  if (get_elf_backend_data (stdoutput)->elf_machine_code != EM_IAMCU
-      || new_flag.bitfield.cpuiamcu)
+  if ((get_elf_backend_data (stdoutput)->elf_machine_code == EM_IAMCU)
+      == new_flag.bitfield.cpuiamcu)
     return;
 
   /* If we are targeting Intel L1OM, we must enable it.  */
@@ -2873,10 +2873,10 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
 	{
 	  if (strcmp (string, cpu_arch[j].name) == 0)
 	    {
-	      check_cpu_arch_compatible (string, cpu_arch[j].flags);
-
 	      if (*string != '.')
 		{
+		  check_cpu_arch_compatible (string, cpu_arch[j].flags);
+
 		  cpu_arch_name = cpu_arch[j].name;
 		  cpu_sub_arch_name = NULL;
 		  cpu_arch_flags = cpu_arch[j].flags;
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 0ecd4ea22a0..5e52c6b8bc1 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -698,6 +698,7 @@ if [gas_32_check] then {
 	    run_dump_test "iamcu-3"
 	    run_dump_test "iamcu-4"
 	    run_dump_test "iamcu-5"
+	    run_dump_test "iamcu-6"
 	    run_list_test "iamcu-inval-1" "-march=iamcu -al"
 	}
     }
diff --git a/gas/testsuite/gas/i386/iamcu-6.d b/gas/testsuite/gas/i386/iamcu-6.d
new file mode 100644
index 00000000000..fd60f073915
--- /dev/null
+++ b/gas/testsuite/gas/i386/iamcu-6.d
@@ -0,0 +1,3 @@
+#as: -J -march=iamcu -I${srcdir}/$subdir
+#objdump: -dw
+#dump: iamcu-1.d
diff --git a/gas/testsuite/gas/i386/iamcu-6.s b/gas/testsuite/gas/i386/iamcu-6.s
new file mode 100644
index 00000000000..a6fc0f20f28
--- /dev/null
+++ b/gas/testsuite/gas/i386/iamcu-6.s
@@ -0,0 +1,2 @@
+	.arch iamcu
+	.include "iamcu-1.s"
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 6770b34d893..deb33e81e92 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -250,7 +250,7 @@ static initializer cpu_flag_init[] =
   { "CPU_K1OM_FLAGS",
     "unknown" },
   { "CPU_IAMCU_FLAGS",
-    "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586" },
+    "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuIAMCU" },
   { "CPU_ADX_FLAGS",
     "CpuADX" },
   { "CPU_RDSEED_FLAGS",
diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h
index fa73bd26136..265e39bddf7 100644
--- a/opcodes/i386-init.h
+++ b/opcodes/i386-init.h
@@ -939,7 +939,7 @@
 #define CPU_IAMCU_FLAGS \
   { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \