From: Samuel Pitoiset Date: Thu, 4 Jun 2020 09:33:28 +0000 (+0200) Subject: radv/aco: enable shaderInt8 and VK_KHR_shader_float16_int8 on GFX6-GFX7 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=64f2d45c3bdc4cd0e56bb31d17fa94246f4f1e59;p=mesa.git radv/aco: enable shaderInt8 and VK_KHR_shader_float16_int8 on GFX6-GFX7 Signed-off-by: Samuel Pitoiset Reviewed-by: Daniel Schürmann Reviewed-by: Rhys Perry Part-of: --- diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 5db1456a4da..32a0458c4ee 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -984,7 +984,7 @@ radv_get_physical_device_features_1_2(struct radv_physical_device *pdevice, f->shaderBufferInt64Atomics = LLVM_VERSION_MAJOR >= 9 || pdevice->use_aco; f->shaderSharedInt64Atomics = LLVM_VERSION_MAJOR >= 9 || pdevice->use_aco; f->shaderFloat16 = pdevice->rad_info.has_packed_math_16bit && !pdevice->use_aco; - f->shaderInt8 = !pdevice->use_aco || pdevice->rad_info.chip_class >= GFX8; + f->shaderInt8 = true; f->descriptorIndexing = true; f->shaderInputAttachmentArrayDynamicIndexing = true; diff --git a/src/amd/vulkan/radv_extensions.py b/src/amd/vulkan/radv_extensions.py index 0aa0861322b..c28d793aff5 100644 --- a/src/amd/vulkan/radv_extensions.py +++ b/src/amd/vulkan/radv_extensions.py @@ -98,7 +98,7 @@ EXTENSIONS = [ Extension('VK_KHR_shader_clock', 1, True), Extension('VK_KHR_shader_draw_parameters', 1, True), Extension('VK_KHR_shader_float_controls', 1, True), - Extension('VK_KHR_shader_float16_int8', 1, '!device->use_aco || device->rad_info.chip_class >= GFX8'), + Extension('VK_KHR_shader_float16_int8', 1, True), Extension('VK_KHR_shader_non_semantic_info', 1, True), Extension('VK_KHR_shader_subgroup_extended_types', 1, True), Extension('VK_KHR_spirv_1_4', 1, True), diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 2ae60fe7d5e..f6c09866113 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -351,8 +351,6 @@ radv_shader_compile_to_nir(struct radv_device *device, } } } - bool int8_enable = !device->physical_device->use_aco || - device->physical_device->rad_info.chip_class >= GFX8; const struct spirv_to_nir_options spirv_options = { .lower_ubo_ssbo_access_to_offsets = true, .caps = { @@ -377,7 +375,7 @@ radv_shader_compile_to_nir(struct radv_device *device, .image_ms_array = true, .image_read_without_format = true, .image_write_without_format = true, - .int8 = int8_enable, + .int8 = true, .int16 = true, .int64 = true, .int64_atomics = true,