From: Tim Newsome <tim@sifive.com>
Date: Fri, 10 Jun 2016 23:41:24 +0000 (-0700)
Subject: Update IDCODE.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=64f81a5af53119ccc33a46aa98450ffb41dc948b;p=riscv-tests.git

Update IDCODE.
---

diff --git a/debug/targets/m2gl_m2s/openocd.cfg b/debug/targets/m2gl_m2s/openocd.cfg
index da20ccc..ea34f87 100644
--- a/debug/targets/m2gl_m2s/openocd.cfg
+++ b/debug/targets/m2gl_m2s/openocd.cfg
@@ -3,7 +3,7 @@ adapter_khz     100
 source [find interface/ftdi/olimex-arm-usb-tiny-h.cfg]
 
 set _CHIPNAME riscv
-jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1525600b
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
 
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME riscv -chain-position $_TARGETNAME